Emre Salman

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 52

Top Topics

Distribution Networks

High Efficiency

Integrated Circuit

Multicore Processors

Top Venues

ACM Great Lakes Symposium on VLSI

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
Enhanced Detection of Thermal Covert Channel Attacks in Multicore Processors. ISQED (2024)
Ivan Miketic, Emre Salman
PowerID: Using Supply-Side Impedances of Power Delivery Networks as Signatures for Consumer Electronics. IEEE Trans. Consumer Electron. 70 (1) (2024)
Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
A New Dataflow Implementation to Improve Energy Efficiency of Monolithic 3D Systolic Arrays. CoRR (2024)
Ivan Miketic, Krithika Yethiraj, Emre Salman
Information-Theoretic Perspective to Thermal Covert Channels. ISCAS (2023)
Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
TREAD-M3D: Temperature-Aware DNN Accelerators for Monolithic 3-D Mobile Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Krithika Dhananjay, Emre Salman
SEAL-RF: Secure Adiabatic Logic for Wirelessly Powered IoT Devices. IEEE Internet Things J. 10 (2) (2023)
Hosein Haghshenas, Mahmood Chahari, Emre Salman, Ryan Willing, Shahrzad Towfighian, Milutin Stanacevic
Power Transfer Optimization for Triboelectric Nanogenerators. BioCAS (2023)
Abrar Abdurrob, Emre Salman, Jack Lombardi
Thermal Integrity of ReRAM-based Near-Memory Computing in 3D Integrated DNN Accelerators. SOCC (2023)
Mallika Rathore, Peter A. Milder, Emre Salman
Precision and Performance-Aware Voltage Scaling in DNN Accelerators. ACM Great Lakes Symposium on VLSI (2023)
Ivan Miketic, Krithika Dhananjay, Emre Salman
Covert Channel Communication as an Emerging Security Threat in 2.5D/3D Integrated Systems. Sensors 23 (4) (2023)
Prachi Shukla, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
Temperature-Aware Monolithic 3D DNN Accelerators for Biomedical Applications. CoRR (2022)
Emre Salman
Session details: Session 2B: Computer-Aided Design (CAD). ACM Great Lakes Symposium on VLSI (2022)
Manav Jain, Milutin Stanacevic, Ryan Willing, Sherry Towfighian, Emre Salman
Wireless Power Transfer for Smart Knee Implants. ISCAS (2022)
Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
High Bandwidth Thermal Covert Channel in 3-D-Integrated Multicore Processors. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Ivan Miketic, Emre Salman
PhaseCamouflage: Leveraging Adiabatic Operation to Thwart Reverse Engineering. IEEE Trans. Very Large Scale Integr. Syst. 29 (7) (2021)
Zhiming Zhang, Ivan Miketic, Emre Salman, Qiaoyan Yu
Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking. ACM Great Lakes Symposium on VLSI (2021)
Krithika Dhananjay, Prachi Shukla, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman
Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects. IEEE Trans. Circuits Syst. II Express Briefs 68 (3) (2021)
Krithika Dhananjay, Emre Salman
EQUAL: Efficient QUasi Adiabatic Logic for Enhanced Side-Channel Resistance. ISVLSI (2021)
Zhiming Zhang, Ivan Miketic, Emre Salman, Qiaoyan Yu
Towards Enhancing Power-Analysis Attack Resilience for Logic Locking Techniques. ISVLSI (2021)
Prachi Shukla, Sean S. Nemtzow, Vasilis F. Pavlidis, Emre Salman, Ayse K. Coskun
Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators. ASP-DAC (2021)
Ivan Miketic, Emre Salman
Energy-Efficient Adiabatic Circuits Using Transistor-Level Monolithic 3D Integration. SoCC (2020)
Mallika Rathore, Peter A. Milder, Emre Salman
Error Probability Models for Voltage-Scaled Multiply-Accumulate Units. IEEE Trans. Very Large Scale Integr. Syst. 28 (7) (2020)
Yongwan Park, Emre Salman
High Efficiency Fully Integrated On-Chip Regulator for Wide-Range Output Current. ISCAS (2020)
Krithika Dhananjay, Emre Salman
Special Session: Adiabatic Circuits for Energy-Efficient and Secure IoT Systems. ICCD (2020)
Berke Gungor, Melik Yazici, Emre Salman, Yasar Gurbuz
Establishing a Covert Communication Channel in RF and mm-Wave Circuits. MWSCAS (2020)
Prachi Shukla, Ayse K. Coskun, Vasilis F. Pavlidis, Emre Salman
An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs. ACM Great Lakes Symposium on VLSI (2019)
Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman
AC Computing Methodology for RF-Powered IoT Devices. IEEE Trans. Very Large Scale Integr. Syst. 27 (5) (2019)
Tasnuva Noor, Emre Salman
A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability. ISCAS (2019)
Yuanfei Huang, Tutu Wan, Emre Salman, Milutin Stanacevic
Signal Shaping at Interface of Wireless Power Harvesting and AC Computational Logic. ISCAS (2019)
Ivan Miketic, Emre Salman
Power and Data Integrity in Monolithic 3D Integrated SIMON Core. ISCAS (2019)
Weicheng Liu, Can Sitik, Emre Salman, Baris Taskin, Savithri Sundareswaran, Benjamin Huang
SLECTS: Slew-Driven Clock Tree Synthesis. IEEE Trans. Very Large Scale Integr. Syst. 27 (4) (2019)
Manav Jain, Alwathiqbellah Ibrahim, Emre Salman, Milutin Stanacevic, Ryan Willing, Shahrzad Towfighian
Frontend Electronic System for Triboelectric Harvester in a Smart Knee Implant. MWSCAS (2019)
Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman
Low Voltage Clock Tree Synthesis with Local Gate Clusters. ACM Great Lakes Symposium on VLSI (2019)
Emre Salman, Milutin Stanacevic, Samir Ranjan Das, Petar M. Djuric
Leveraging RF Power for Intelligent Tag Networks. ACM Great Lakes Symposium on VLSI (2018)
Chen Yan, Jaya Dofe, Scott Kontak, Qiaoyan Yu, Emre Salman
Hardware-Efficient Logic Camouflaging for Monolithic 3-D ICs. IEEE Trans. Circuits Syst. II Express Briefs (6) (2018)
Tutu Wan, Emre Salman
Ultra Low Power SIMON Core for Lightweight Encryption. ISCAS (2018)
Mallika Rathore, Emre Salman
Error Probability Models to Facilitate Approximate Computing in TFET based Circuits. ISCAS (2018)
Chen Yan, Emre Salman
Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Chen Yan, Zhihua Gan, Emre Salman
In-package spiral inductor characterization for high efficiency buck converters. ISCAS (2017)
Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman
Energy efficient AC computing methodology for wirelessly powered IoT devices. ISCAS (2017)
Jaya Dofe, Zhiming Zhang, Qiaoyan Yu, Chen Yan, Emre Salman
Impact of Power Distribution Network on Power Analysis Attacks in Three-Dimensional Integrated Circuits. ACM Great Lakes Symposium on VLSI (2017)
Chen Yan, Zhihua Gan, Emre Salman
Package-embedded spiral inductor characterization with application to switching buck converters. Microelectron. J. 66 (2017)
Chen Yan, Emre Salman
Routing Congestion Aware Cell Library Development for Monolithic 3D ICs. ICRC (2017)
Hailang Wang, Emre Salman
Closed-Form Expressions for I/O Simultaneous Switching Noise Revisited. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Chen Yan, Scott Kontak, Hailang Wang, Emre Salman
Open source cell library Mono3D to develop large-scale monolithic 3D integrated circuits. ISCAS (2017)
Tutu Wan, Yasha Karimi, Milutin Stanacevic, Emre Salman
Perspective Paper - Can AC Computing Be an Alternative for Wirelessly Powered IoT Devices? IEEE Embed. Syst. Lett. 9 (1) (2017)
Tutu Wan, Emre Salman, Milutin Stanacevic
A new circuit design framework for IoT devices: Charge-recycling with wireless power harvesting. ISCAS (2016)
Jaya Dofe, Qiaoyan Yu, Hailang Wang, Emre Salman
Hardware Security Threats and Potential Countermeasures in Emerging 3D ICs. ACM Great Lakes Symposium on VLSI (2016)
Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin
Exploiting useful skew in gated low voltage clock trees. ISCAS (2016)
Yongwan Park, Emre Salman
On-chip hybrid regulator topology for portable SoCs with near-threshold operation. ISCAS (2016)
Jaya Dofe, Chen Yan, Scott Kontak, Emre Salman, Qiaoyan Yu
Transistor-level camouflaged logic locking method for monolithic 3D IC security. AsianHOST (2016)
Can Sitik, Weicheng Liu, Baris Taskin, Emre Salman
Design Methodology for Voltage-Scaled Clock Distribution Networks. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Zhihua Gan, Emre Salman, Milutin Stanacevic
Figures-of-Merit to Evaluate the Significance of Switching Noise in Analog Circuits. IEEE Trans. Very Large Scale Integr. Syst. 23 (12) (2015)
Hailang Wang, Emre Salman
Enhancing system-wide power integrity in 3D ICs with power gating. ISQED (2015)
Leo Filippini, Emre Salman, Baris Taskin
A wirelessly powered system with charge recovery logic. ICCD (2015)
Shiwei Fang, Emre Salman
Low swing TSV signaling using novel level shifters with single supply voltage. ISCAS (2015)
Peirong Ji, Emre Salman
Quantifying the effect of local interconnects on on-chip power distribution. Microelectron. J. 46 (3) (2015)
Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin
Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks. ACM Great Lakes Symposium on VLSI (2015)
Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin
Enhanced level shifter for multi-voltage operation. ISCAS (2015)
Hailang Wang, Emre Salman
Resource allocation methodology for through silicon vias and sleep transistors in 3D ICs. ISQED (2015)
Mallika Rathore, Weicheng Liu, Emre Salman, Can Sitik, Baris Taskin
A Novel Static D-Flip-Flop Topology for Low Swing Clocking. ACM Great Lakes Symposium on VLSI (2015)
Can Sitik, Emre Salman, Leo Filippini, Sung-Jun Yoon, Baris Taskin
FinFET-Based Low-Swing Clocking. ACM J. Emerg. Technol. Comput. Syst. 12 (2) (2015)
Hailang Wang, Emre Salman
Decoupling Capacitor Topologies for TSV-Based 3-D ICs With Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 23 (12) (2015)
Can Sitik, Leo Filippini, Emre Salman, Baris Taskin
High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. ISVLSI (2014)
Hailang Wang, Mohammad H. Asgari, Emre Salman
Compact model to efficiently characterize TSV-to-transistor noise coupling in 3D ICs. Integr. 47 (3) (2014)
Hailang Wang, Mohammad H. Asgari, Emre Salman
Efficient characterization of TSV-to-transistor noise coupling in 3D ICs. ACM Great Lakes Symposium on VLSI (2013)
Suhas M. Satheesh, Emre Salman
Effect of TSV fabrication technology on power distribution in 3D ICs. ACM Great Lakes Symposium on VLSI (2013)
Hailang Wang, Emre Salman
Power gating topologies in TSV based 3D integrated circuits. ACM Great Lakes Symposium on VLSI (2013)
Zhihua Gan, Emre Salman, Milutin Stanacevic
Methodology to determine dominant noise source in a system-on-chip based implantable device. SoCC (2012)
Emre Salman, Eby G. Friedman
Utilizing interdependent timing constraints to enhance robustness in synchronous circuits. Microelectron. J. 43 (2) (2012)
Suhas M. Satheesh, Emre Salman
Design space exploration for robust power delivery in TSV based 3-D systems-on-chip. SoCC (2012)
Suhas M. Satheesh, Emre Salman
Power Distribution in TSV-Based 3-D Processor-Memory Stacks. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (4) (2012)
Selçuk Köse, Emre Salman, Eby G. Friedman
Shielding Methodologies in the Presence of Power/Ground Noise. IEEE Trans. Very Large Scale Integr. Syst. 19 (8) (2011)
Emre Salman
Noise coupling due to through silicon vias (TSVs) in 3-D integrated circuits. ISCAS (2011)
Renatas Jakushokas, Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin, Cynthia L. Recker
Compact substrate models for efficient noise coupling and signal isolation analysis. ISCAS (2010)
Emre Salman, Eby G. Friedman
Methodology to achieve higher tolerance to delay variations in synchronous circuits. ACM Great Lakes Symposium on VLSI (2010)
Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Identification of Dominant Noise Source and Parameter Sensitivity for Substrate Coupling. IEEE Trans. Very Large Scale Integr. Syst. 17 (10) (2009)
Selçuk Köse, Emre Salman, Eby G. Friedman
Shielding Methodologies in the Presence of Power/Ground Noise. ISCAS (2009)
Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Contact merging algorithm for efficient substrate noise analysis in large scale circuits. ACM Great Lakes Symposium on VLSI (2009)
Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Methodology for Efficient Substrate Noise Analysis in Large-Scale Mixed-Signal Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17 (10) (2009)
Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Worst Case Power/Ground Noise Estimation Using an Equivalent Transition Time for Resonance. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2009)
Selçuk Köse, Emre Salman, Zeljko Ignjatovic, Eby G. Friedman
Pseudo-random clocking to enhance signal integrity. SoCC (2008)
Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates. ISQED (2008)
Emre Salman, Renatas Jakushokas, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Input port reduction for efficient substrate extraction in large scale IC's. ISCAS (2008)
Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Equivalent rise time for resonance in power/ground noise estimation. ISCAS (2008)
Emre Salman, Eby G. Friedman, Radu M. Secareanu, Olin L. Hartin
Substrate Noise Reduction Based On Noise Aware Cell Design. ISCAS (2007)
Emre Salman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar, Eby G. Friedman
Exploiting Setup-Hold-Time Interdependence in Static Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (6) (2007)
Emre Salman, Eby G. Friedman, Radu M. Secareanu
Substrate and Ground Noise Interactions in Mixed-Signal Circuits. SoCC (2006)
Emre Salman, Eby G. Friedman, Ali Dasdan, Feroze Taraporevala, Kayhan Küçükçakar
Pessimism Reduction In Static Timing Analysis Using Interdependent Setup and Hold Times. ISQED (2006)