Power Distribution in TSV-Based 3-D Processor-Memory Stacks.

Suhas M. Satheesh Emre Salman

Published in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2012)

Keyphrases

power distribution
memory management
transmission line
memory subsystem
intel xeon
memory hierarchy
high speed
processing elements
memory access
processor core
database workloads
operating system
multithreading
random access memory
real time
instruction set
main memory
image denoising