Leo Filippini

Publication Activity (10 Years)

Years Active: 2014-2024
Publications (10 Years): 13

Top Topics

Top Venues

Publications

Yilmaz Ege Gonul, Leo Filippini, Junghoon Oh, Ragh Kuttappa, Scott Lerner, Mineo Kaneko, Baris Taskin
Design Automation for Charge Recovery Logic. ISCAS (2024)
Ragh Kuttappa, Leo Filippini, Nicholas Sica, Baris Taskin
Scalable Resonant Power Clock Generation for Adiabatic Logic Design. ISVLSI (2021)
Ragh Kuttappa, Steven Khoa, Leo Filippini, Vasil Pano, Baris Taskin
Comprehensive Low Power Adiabatic Circuit Design with Resonant Power Clocking. ISCAS (2020)
Ragh Kuttappa, Scott Lerner, Leo Filippini, Baris Taskin
Low Swing - Low Frequency Rotary Traveling Wave Oscillators. ISCAS (2019)
Leo Filippini, Baris Taskin
The Adiabatically Driven StrongARM Comparator. IEEE Trans. Circuits Syst. II Express Briefs (12) (2019)
Leo Filippini, Baris Taskin
A 900 MHz Charge Recovery Comparator With 40 fJ per Conversion. ISCAS (2018)
Leo Filippini, Diane Lim, Lunal Khuon, Baris Taskin
Wireless charge recovery system for implanted electroencephalography applications in mice. ISQED (2017)
Leo Filippini, Lunal Khuon, Baris Taskin
Charge recovery implementation of an analog comparator: Initial results. MWSCAS (2017)
Ragh Kuttappa, Leo Filippini, Scott Lerner, Baris Taskin
Stability of Rotary Traveling Wave Oscillators under process variations and NBTI. ISCAS (2017)
Leo Filippini, Baris Taskin
A charge recovery logic system bus. SLIP (2017)
Leo Filippini, Baris Taskin
Charge recovery logic for thermal harvesting applications. ISCAS (2016)
Leo Filippini, Emre Salman, Baris Taskin
A wirelessly powered system with charge recovery logic. ICCD (2015)
Can Sitik, Emre Salman, Leo Filippini, Sung-Jun Yoon, Baris Taskin
FinFET-Based Low-Swing Clocking. ACM J. Emerg. Technol. Comput. Syst. 12 (2) (2015)
Can Sitik, Leo Filippini, Emre Salman, Baris Taskin
High Performance Low Swing Clock Tree Synthesis with Custom D Flip-Flop Design. ISVLSI (2014)