Eduardo Quiñones

ORCID

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 59

Top Venues

Publications

Adrian Munera, Sara Royuela, Michael Pressler, Harald Mackamul, Dirk Ziegenbein, Eduardo Quiñones
Fine-grained adaptive parallelism for automotive systems through AMALTHEA and OpenMP. J. Syst. Archit. 146 (2024)
Chenle Yu, Sara Royuela, Eduardo Quiñones
Taskgraph: A Low Contention OpenMP Tasking Framework. IEEE Trans. Parallel Distributed Syst. 34 (8) (2023)
Tiago Carvalho, Luís Miguel Pinho, Mohammad Samadi, Sara Royuela, Adrian Munera, Eduardo Quiñones
Framework for the Analysis and Configuration of Real-Time OpenMP Applications. INDIN (2023)
Elli Kartsakli, Jordi Pérez-Romero, Oriol Sallent, Nikolaos G. Bartzoudis, Valerio Frascella, Swarup Kumar Mohalik, Thiis Metsch, Angelos Antonopoulos, Ömer Faruk Tuna, Yansha Deng, Xin Tao, Maria A. Serrano, Eduardo Quiñones
AI-Powered Edge Computing Evolution for Beyond 5G Communication Networks. EuCNC/6G Summit (2023)
Alessio Medaglini, Sandro Bartolini, Gianluca Mandò, Eduardo Quiñones, Sara Royuela
Software-Based Fault-Detection Technique for Object Tracking in Autonomous Vehicles. MECO (2023)
Mohammad Samadi Gharajeh, Sara Royuela, Luís Miguel Pinho, Tiago Carvalho, Eduardo Quiñones
Heuristic-based Task-to-Thread Mapping in Multi-Core Processors. ETFA (2022)
Chenle Yu, Sara Royuela, Eduardo Quiñones
Taskgraph: A Low Contention OpenMP Tasking Framework. CoRR (2022)
Chenle Yu, Sara Royuela, Eduardo Quiñones
A Low Overhead Tasking Model for OpenMP. Euro-Par Workshops (2021)
Chenle Yu, Sara Royuela, Eduardo Quiñones
Enhancing OpenMP Tasking Model: Performance and Portability. IWOMP (2021)
Adrian Munera, Sara Royuela, Roger Ferrer, Raul Peñacoba, Eduardo Quiñones
Static Analysis to Enhance Programmability and Performance in OmpSs-2. ISC Workshops (2020)
Adrian Munera, Sara Royuela, Eduardo Quiñones
Towards a Qualifiable OpenMP Framework for Embedded Systems. DATE (2020)
Chenle Yu, Sara Royuela, Eduardo Quiñones
OpenMP to CUDA graphs: a compiler-based transformation to enhance the programmability of NVIDIA devices. SCOPES (2020)
Adrian Munera, Sara Royuela, Germán Llort, Estanislao Mercadal, Franck Wartel, Eduardo Quiñones
Experiences on the characterization of parallel applications in embedded systems with Extrae/Paraver. ICPP (2020)
Eduardo Quiñones, Sara Royuela, Claudio Scordino, Paolo Gai, Luís Miguel Pinho, Luís Nogueira, Jan Rollo, Tommaso Cucinotta, Alessandro Biondi, Arne Hamann, Dirk Ziegenbein, Hadi Saoud, Romain Soulat, Björn Forsberg, Luca Benini, Gianluca Mandò, Luigi Rucher
The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization. ISORC (2020)
José Flich, Carles Hernández, Eduardo Quiñones, Roberto Paredes
Distributed Training on a Highly Heterogeneous HPC System. SAMOS (2020)
Sara Royuela, Luís Miguel Pinho, Eduardo Quiñones
Enabling Ada and OpenMP runtimes interoperability through template-based execution. J. Syst. Archit. 105 (2020)
Sara Royuela, Maria A. Serrano, Marta Garcia-Gasulla, Sergi Mateo Bellido, Jesús Labarta, Eduardo Quiñones
The Cooperative Parallel: A Discussion About Run-Time Schedulers for Nested Parallelism. IWOMP (2019)
Sara Royuela, Luís Miguel Pinho, Eduardo Quiñones
Converging safety and high-performance domains: Integrating OpenMP into Ada. DATE (2018)
Eduardo Quiñones, Marko Bertogna, Erez Hadad, Ana Juan Ferrer, Luca Chiantore, Alfredo Reboa
Big Data Analytics for Smart Cities: The H2020 CLASS Project. SYSTOR (2018)
Maria A. Serrano, Eduardo Quiñones
Response-time analysis of DAG tasks supporting heterogeneous computing. DAC (2018)
Maria A. Serrano, Sara Royuela, Eduardo Quiñones
Towards an OpenMP Specification for Critical Real-Time Systems. IWOMP (2018)
Sara Royuela, Xavier Martorell, Eduardo Quiñones, Luís Miguel Pinho
Safe Parallelism: Compiler Analysis Techniques for Ada and OpenMP. Ada-Europe (2018)
Mikel Fernández, David Morales, Leonidas Kosmidis, Alen Bardizbanyan, Ian Broster, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Paulo Machado, Luca Fossati
Probabilistic timing analysis on time-randomized platforms for the space domain. DATE (2017)
Alessandra Melani, Maria A. Serrano, Marko Bertogna, Isabella Cerutti, Eduardo Quiñones, Giorgio C. Buttazzo
A static scheduling approach to enable safety-critical OpenMP applications. ASP-DAC (2017)
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. IEEE Trans. Computers 66 (4) (2017)
Sara Royuela, Xavier Martorell, Eduardo Quiñones, Luís Miguel Pinho
OpenMP Tasking Model for Ada: Safety and Correctness. Ada-Europe (2017)
Sara Royuela, Alejandro Duran, Maria A. Serrano, Eduardo Quiñones, Xavier Martorell
A Functional Safety OpenMP ^* for Critical Real-Time Embedded Systems. IWOMP (2017)
Maria A. Serrano, Alessandra Melani, Sebastian Kehr, Marko Bertogna, Eduardo Quiñones
An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-Based Global Fixed Priority Scheduling. ISORC (2017)
Sebastian Kehr, Eduardo Quiñones, Dominik Langen, Bert Böddeker, Günter Schäfer
Parcus: Energy-Aware and Robust Parallelization of AUTOSAR Legacy Applications. RTAS (2017)
Milos Panic, Jaume Abella, Eduardo Quiñones, Carles Hernández, Theo Ungerer, Francisco J. Cazorla
Adapting TDMA arbitration for measurement-based probabilistic timing analysis. Microprocess. Microsystems 52 (2017)
Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
Modelling the confidence of timing analysis for time randomised caches. SIES (2016)
Pedro Benedicte, Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
A confidence assessment of WCET estimates for software time randomized caches. INDIN (2016)
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15 (3) (2016)
Francisco J. Cazorla, Jaume Abella, Jan Andersson, Tullio Vardanega, Francis Vatrinet, Iain Bate, Ian Broster, Mikel Azkarate-askasua, Franck Wartel, Liliana Cucu, Fabrice Cros, Glenn Farrall, Adriana Gogonel, Andrea Gianarro, Benoit Triquet, Carles Hernández, Code Lo, Cristian Maxim, David Morales, Eduardo Quiñones, Enrico Mezzetti, Leonidas Kosmidis, Irune Agirre, Mikel Fernández, Mladen Slijepcevic, Philippa Conmy, Walid Talaboulma
PROXIMA: Improving Measurement-Based Timing Analysis through Randomisation and Probabilistic Analysis. DSD (2016)
Leonidas Kosmidis, Davide Compagnin, David Morales, Enrico Mezzetti, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
Measurement-Based Timing Analysis of the AURIX Caches. WCET (2016)
Sebastian Kehr, Milos Panic, Eduardo Quiñones, Bert Böddeker, Jorge Becerril Sandoval, Jaume Abella, Francisco J. Cazorla, Günter Schäfer
Supertask: Maximizing runnable-level parallelism in AUTOSAR applications. DATE (2016)
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Carles Hernández, Andrea Gianarro, Ian Broster, Francisco J. Cazorla
Fitting processor architectures for measurement-based probabilistic timing analysis. Microprocess. Microsystems 47 (2016)
Leonidas Kosmidis, Roberto Vargas, David Morales, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
TASA: toolchain-agnostic static software randomisation for critical real-time systems. ICCAD (2016)
Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems. SIES (2016)
Maria A. Serrano, Alessandra Melani, Marko Bertogna, Eduardo Quiñones
Response-time analysis of DAG tasks under fixed priority scheduling with limited preemptions. DATE (2016)
Milos Panic, Carles Hernández, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems. RTAS (2016)
Mladen Slijepcevic, Mikel Fernández, Carles Hernández, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
pTNoC: Probabilistically Time-Analyzable Tree-Based NoC for Mixed-Criticality Systems. DSD (2016)
Roberto Vargas, Sara Royuela, Maria A. Serrano, Xavier Martorell, Eduardo Quiñones
A lightweight OpenMP4 run-time for embedded systems. ASP-DAC (2016)
Milos Panic, Carles Hernández, Jaume Abella, Antoni Roca, Eduardo Quiñones, Francisco J. Cazorla
Improving performance guarantees in wormhole mesh NoC designs. DATE (2016)
Enrico Mezzetti, Marco Ziccardi, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Randomized Caches Can Be Pretty Useful to Hard Real-Time Systems. Leibniz Trans. Embed. Syst. 2 (1) (2015)
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
Resource usage templates and signatures for COTS multicore processors. DAC (2015)
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Tullio Vardanega, Francisco J. Cazorla
Seeking Time-Composable Partitions of Tasks for COTS Multicore Processors. ISORC (2015)
Franck Wartel, Leonidas Kosmidis, Adriana Gogonel, Andrea Baldovin, Zoë R. Stephenson, Benoit Triquet, Eduardo Quiñones, Code Lo, Enrico Mezzetti, Ian Broster, Jaume Abella, Liliana Cucu-Grosjean, Tullio Vardanega, Francisco J. Cazorla
Timing analysis of an avionics case study on complex hardware/software platforms. DATE (2015)
Milos Panic, Jaume Abella, Carles Hernández, Eduardo Quiñones, Theo Ungerer, Francisco J. Cazorla
Enabling TDMA Arbitration in the Context of MBPTA. DSD (2015)
Luís Miguel Pinho, Vincent Nélis, Patrick Meumeu Yomsi, Eduardo Quiñones, Marko Bertogna, Paolo Burgio, Andrea Marongiu, Claudio Scordino, Paolo Gai, Michele Ramponi, Michal Mardiak
P-SOCRATES: A parallel software framework for time-critical many-core systems. Microprocess. Microsystems 39 (8) (2015)
Suzana Milutinovic, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
PACO: fast average-performance estimation for time-randomized caches. DAC (2015)
Jaume Abella, Carles Hernández, Eduardo Quiñones, Francisco J. Cazorla, Philippa Ryan Conmy, Mikel Azkarate-askasua, Jon Pérez, Enrico Mezzetti, Tullio Vardanega
WCET analysis methods: Pitfalls and challenges on their trustworthiness. SIES (2015)
Suzana Milutinovic, Jaume Abella, Damien Hardy, Eduardo Quiñones, Isabelle Puaut, Francisco J. Cazorla
Speeding up Static Probabilistic Timing Analysis. ARCS (2015)
Roberto Vargas, Eduardo Quiñones, Andrea Marongiu
OpenMP and timing predictability: a possible union? DATE (2015)
Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Günter Schäfer
Parallel execution of AUTOSAR legacy applications on multicore ECUs with timed implicit communication. DAC (2015)
Maria A. Serrano, Alessandra Melani, Roberto Vargas, Andrea Marongiu, Marko Bertogna, Eduardo Quiñones
Timing characterization of OpenMP4 tasking model. CASES (2015)
Gabriel Fernandez, Javier Jalle, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Francisco J. Cazorla
Increasing confidence on measurement-based contention bounds for real-time round-robin buses. DAC (2015)
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Tullio Vardanega, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
Introduction to partial time composability for COTS multicores. SAC (2015)
Milos Panic, Eduardo Quiñones, Carles Hernández, Jaume Abella, Francisco J. Cazorla
CAP: Communication-Aware Allocation Algorithm for Real-Time Parallel Applications on Many-Cores. DSD (2015)
Luís Miguel Pinho, Eduardo Quiñones, Marko Bertogna, Andrea Marongiu, Jorge Pereira Carlos, Claudio Scordino, Michele Ramponi
P-SOCRATES: A Parallel Software Framework for Time-Critical Many-Core Systems. DSD (2014)
Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Efficient Cache Designs for Probabilistically Analysable Real-Time Systems. IEEE Trans. Computers 63 (12) (2014)
Gabriel Fernandez, Jaume Abella, Eduardo Quiñones, Christine Rochange, Tullio Vardanega, Francisco J. Cazorla
Contention in Multicore Hardware Shared Resources: Understanding of the State of the Art. WCET (2014)
Milos Panic, Eduardo Quiñones, Pavel G. Zaykov, Carles Hernández, Jaume Abella, Francisco J. Cazorla
Parallel many-core avionics systems. EMSOFT (2014)
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Time-Analysable Non-Partitioned Shared Caches for Real-Time Multicore Systems. DAC (2014)
Jaume Abella, Damien Hardy, Isabelle Puaut, Eduardo Quiñones, Francisco J. Cazorla
On the Comparison of Deterministic and Probabilistic WCET Estimation Techniques. ECRTS (2014)
Milos Panic, Sebastian Kehr, Eduardo Quiñones, Bert Böddeker, Jaume Abella, Francisco J. Cazorla
RunPar: An allocation algorithm for automotive applications exploiting runnable parallelism in multicores. CODES+ISSS (2014)
Javier Jalle, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Bus designs for time-probabilistic multicore processors. DATE (2014)
Leonidas Kosmidis, Jaume Abella, Franck Wartel, Eduardo Quiñones, Antoine Colin, Francisco J. Cazorla
PUB: Path Upper-Bounding for Measurement-Based Probabilistic Timing Analysis. ECRTS (2014)
Vincent Nélis, Patrick Meumeu Yomsi, Luís Miguel Pinho, José Carlos Fonseca, Marko Bertogna, Eduardo Quiñones, Roberto Vargas, Andrea Marongiu
The Challenge of Time-Predictability in Modern Many-Core Architectures. WCET (2014)
Jaume Abella, Eduardo Quiñones, Franck Wartel, Tullio Vardanega, Francisco J. Cazorla
Heart of Gold: Making the Improbable Happen to Increase Confidence in MBPTA. ECRTS (2014)
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments. IEEE Micro 34 (6) (2014)
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Glenn Farrall, Franck Wartel, Francisco J. Cazorla
Containing Timing-Related Certification Cost in Automotive Systems Deploying Complex Hardware. DAC (2014)
Javier Jalle, Eduardo Quiñones, Jaume Abella, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study. RTSS (2014)
Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
AHRB: A high-performance time-composable AMBA AHB bus. RTAS (2014)
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Ian Broster, Francisco J. Cazorla
Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture. DSD (2014)
Francisco J. Cazorla, Eduardo Quiñones, Tullio Vardanega, Liliana Cucu, Benoit Triquet, Guillem Bernat, Emery D. Berger, Jaume Abella, Franck Wartel, Michael Houston, Luca Santinelli, Leonidas Kosmidis, Code Lo, Dorin Maxim
PROARTIS: Probabilistically Analyzable Real-Time Systems. ACM Trans. Embed. Comput. Syst. 12 (2s) (2013)
Leonidas Kosmidis, Eduardo Quiñones, Jaume Abella, Tullio Vardanega, Francisco J. Cazorla
Achieving timing composability with measurement-based probabilistic timing analysis. ISORC (2013)
Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
Deconstructing bus access control policies for Real-Time multicores. SIES (2013)
Mladen Slijepcevic, Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis. ECRTS (2013)
Sylvain Girbal, Miquel Moretó, Arnaud Grasset, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Sami Yehia
On the convergence of mainstream and mission-critical markets. DAC (2013)
Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
A cache design for probabilistically analysable real-time systems. DATE (2013)
Franck Wartel, Leonidas Kosmidis, Code Lo, Benoit Triquet, Eduardo Quiñones, Jaume Abella, Adriana Gogonel, Andrea Baldovin, Enrico Mezzetti, Liliana Cucu, Tullio Vardanega, Francisco J. Cazorla
Measurement-based probabilistic timing analysis: Lessons from an integrated-modular avionics case study. SIES (2013)
Leonidas Kosmidis, Charlie Curtsinger, Eduardo Quiñones, Jaume Abella, Emery D. Berger, Francisco J. Cazorla
Probabilistic timing analysis on conventional cache designs. DATE (2013)
Marco Paolieri, Jörg Mische, Stefan Metzlaff, Mike Gerdes, Eduardo Quiñones, Sascha Uhrig, Theo Ungerer, Francisco J. Cazorla
A hard real-time capable multi-core SMT processor. ACM Trans. Embed. Comput. Syst. 12 (3) (2013)
Milos Panic, Germán Rodríguez, Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla
On-chip ring network designs for hard-real time systems. RTNS (2013)
Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, Jaume Abella
Upper-bounding Program Execution Time with Extreme Value Theory. WCET (2013)
Leonidas Kosmidis, Tullio Vardanega, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Applying Measurement-Based Probabilistic Timing Analysis to Buffer Resources. WCET (2013)
Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla
Timing effects of DDR memory systems in hard real-time multicore architectures: Issues and solutions. ACM Trans. Embed. Comput. Syst. 12 (1s) (2013)
Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD (2013)
Leonidas Kosmidis, Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla
Multi-level Unified Caches for Probabilistically Time Analysable Real-Time Systems. RTSS (2013)
Mikel Fernández, Roberto Gioiosa, Eduardo Quiñones, Luca Fossati, Marco Zulianello, Francisco J. Cazorla
Assessing the suitability of the NGMP multi-core processor in the space domain. EMSOFT (2012)
Petar Radojkovic, Sylvain Girbal, Arnaud Grasset, Eduardo Quiñones, Sami Yehia, Francisco J. Cazorla
On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Liliana Cucu-Grosjean, Luca Santinelli, Michael Houston, Code Lo, Tullio Vardanega, Leonidas Kosmidis, Jaume Abella, Enrico Mezzetti, Eduardo Quiñones, Francisco J. Cazorla
Measurement-Based Probabilistic Timing Analysis for Multi-path Programs. ECRTS (2012)
Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat
Towards improved survivability in safety-critical systems. IOLTS (2011)
Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Robert I. Davis, Mateo Valero
IA^3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems. IEEE Real-Time and Embedded Technology and Applications Symposium (2011)
Marco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Julian Wolf, Theo Ungerer, Sascha Uhrig, Zlatko Petrov
A Software-Pipelined Approach to Multicore Execution of Timing Predictable Multi-threaded Hard Real-Time Tasks. ISORC (2011)
Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Yanos Sazeides, Mateo Valero
RVC: a mechanism for time-analyzable real-time processors with faulty caches. HiPEAC (2011)
Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides
RVC-based time-predictable faulty caches for safety-critical systems. IOLTS (2011)
Eduardo Quiñones, Jaume Abella, Francisco J. Cazorla, Mateo Valero
Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systems. SIGBED Rev. 8 (3) (2011)
Eduardo Quiñones, Joan-Manuel Parcerisa, Antonio González
Leveraging Register Windows to Reduce Physical Registers to the Bare Minimum. IEEE Trans. Computers 59 (12) (2010)

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Publication Activity (10 Years)

Top Topics

Top Venues

Eduardo Quiñones