Hugues Cassé

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 16

Top Topics

Speculative Execution

Hardware Architecture

Decision Diagrams

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat
MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. IEEE Trans. Computers 72 (1) (2023)
Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange
Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange
A Framework for Calculating WCET Based on Execution Decision Diagrams. ACM Trans. Embed. Comput. Syst. 21 (3) (2022)
Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange
Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources. CoRR (2022)
Pascal Sotin, Quentin Vermande, Hugues Cassé
Data Cache Analysis by Counting Integer Points. RTNS (2021)
Thomas Carle, Hugues Cassé
Static extraction of memory access profiles for multi-core interference analysis of real-time tasks. CoRR (2021)
Alban Gruin, Thomas Carle, Hugues Cassé, Christine Rochange
Speculative Execution and Timing Predictability in an Open Source RISC-V Core. RTSS (2021)
Thomas Carle, Hugues Cassé
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks. ARCS (2021)
Zhenyu Bai, Hugues Cassé, Marianne De Michiel, Thomas Carle, Christine Rochange
Improving the Performance of WCET Analysis in the Presence of Variable Latencies. LCTES (2020)
Wei-Tsun Sun, Eric Jenn, Hugues Cassé
Validating Static WCET Analysis: A Method and Its Application. WCET (2019)
Thomas Carle, Hugues Cassé
Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures. WCET (2018)
Jordy Ruiz, Hugues Cassé, Marianne De Michiel
Working Around Loops for Infeasible Path Detection in Binary Programs. SCAM (2017)
Claire Maiza, Pascal Raymond, Catherine Parent-Vigouroux, Armelle Bonenfant, Fabienne Carrier, Hugues Cassé, Philippe Cuenot, Denis Claraz, Nicolas Halbwachs, Erwan Jahier, Hanbing Li, Marianne De Michiel, Vincent Mussot, Isabelle Puaut, Christine Rochange, Erven Rohou, Jordy Ruiz, Pascal Sotin, Wei-Tsun Sun
The W-SEPT Project: Towards Semantic-Aware WCET Estimation. WCET (2017)
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel G. Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quiñones, Milos Panic, Jaume Abella, Carles Hernández, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. ACM Trans. Embed. Comput. Syst. 15 (3) (2016)
Wei-Tsun Sun, Hugues Cassé
Dynamic Branch Resolution Based on Combined Static Analyses. WCET (2016)
Vincent Mussot, Jordy Ruiz, Pascal Sotin, Marianne De Michiel, Hugues Cassé
Expressing and Exploiting Conflicts over Paths in WCET Analysis. WCET (2016)
Hugues Cassé, Haluk Ozaktas, Christine Rochange
A Framework to Quantify the Overestimations of Static WCET Analysis. WCET (2015)
Arthur Pyka, Pavel G. Zaykov, Hugues Cassé, Haluk Ozaktas, Christine Rochange, Sascha Uhrig
. INDIN (2015)
Jordy Ruiz, Hugues Cassé
Using SMT Solving for the Lookup of Infeasible Paths in Binary Programs. WCET (2015)
Hajer Herbegue, Mamoun Filali, Hugues Cassé
Formal Architecture Specification for Time Analysis. ARCS (2014)
Hugues Cassé, Florian Birée, Pascal Sainrat
Multi-architecture Value Analysis for Machine Code. WCET (2013)
Hajer Herbegue, Hugues Cassé, Mamoun Filali, Christine Rochange
Hardware architecture specification and constraint-based WCET computation. SIES (2013)
Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, João Fernandes, Pavel G. Zaykov, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Ian Broster, Nick Lay, David George, Eduardo Quiñones, Milos Panic, Jaume Abella, Francisco J. Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. DSD (2013)
Armelle Bonenfant, Hugues Cassé, Marianne De Michiel, Jens Knoop, Laura Kovács, Jakob Zwirchmayr
FFX: a portable WCET annotation language. RTNS (2012)
Marianne De Michiel, Armelle Bonenfant, Hugues Cassé
Normalisation of Loops with Covariant Variables. Electron. Notes Theor. Comput. Sci. 289 (2012)
Frédéric Boniol, Hugues Cassé, Eric Noulard, Claire Pagetti
Deterministic Execution Model on COTS Hardware. ARCS (2012)
Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26 (6) (2011)
Vincent Lefftz, Jean Bertrand, Hugues Cassé, Christophe Clienti, Philippe Coussy, Laurent Maillet-Contoz, Philippe Mercier, Pierre Moreau, Laurence Pierre, Emmanuel Vaumorin
A Design Flow for Critical Embedded Systems. SIES (2010)
Hugues Cassé, Karine Heydemann, Haluk Ozaktas, Jonathan Ponroy, Christine Rochange, Olivier Zendra
A framework to experiment optimizations for real-time and embedded software CoRR (2010)
Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat
OTAWA: An Open Toolbox for Adaptive WCET Analysis. SEUS (2010)
Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC (2010)
Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel
Experimentation of WCET computation on both ends of automotive processor range. EDCC-CARS (2010)
Marianne De Michiel, Armelle Bonenfant, Clément Ballabriga, Hugues Cassé
Partial Flow Analysis with oRange. ISoLA (2) (2010)
Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30 (5) (2010)
Clément Ballabriga, Hugues Cassé, Marianne De Michiel
A Generic Framework for Blackbox Components in WCET Computation. WCET (2009)
Clément Ballabriga, Hugues Cassé, Pascal Sainrat
An improved approach for set-associative instruction cache partial analysis. SAC (2008)
Niklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan
WCET 2008 - Report from the Tool Challenge 2008 -- 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis. WCET (2008)
Clément Ballabriga, Hugues Cassé
Improving the WCET computation time by IPET using control flow graph partitioning. WCET (2008)
Clément Ballabriga, Hugues Cassé
Improving the First-Miss Computation in Set-Associative Instruction Caches. ECRTS (2008)
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun
Inter-task WCET computation for a-way instruction caches. SIES (2008)
Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat
Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation. RTCSA (2008)
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada
Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis. SIES (2007)
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean Paul Bahsoun, Marianne De Michiel
PapaBench: a Free Real-Time Benchmark. WCET (2006)
Hugues Cassé, L. Féraud, Christine Rochange, Pascal Sainrat
Une approche pour réduire la complexité du flot de contrôle dans les programmes C. Tech. Sci. Informatiques 21 (7) (2002)
Hugues Cassé, L. Féraud, Christine Rochange, Pascal Sainrat
Using the abstract interpretation technique for static pointer analysis. SIGARCH Comput. Archit. News 27 (1) (1999)