Eduardo Marques

Publication Activity (10 Years)

Years Active: 1986-2022
Publications (10 Years): 11

Top Topics

Operating System

Hardware Software Partitioning

General Purpose

Top Venues

J. Comput. Syst. Sci.

Publications

Rui Lopes, Filipe Rocha, Susana Sargento, Miguel Luís, Ricardo Leitão, Eduardo Marques, Bruno Antunes
A multi-layer probing approach for video over 5G in vehicular scenarios. Veh. Commun. 38 (2022)
Frederica Gonçalves, Ana Lúcia Martins, João Carlos Ferreira, Eduardo Marques, Magno Andrade, Luís Mota
Tourism Guidance Tracking and Safety Platform. INTSYS (2019)
Carlos Alberto Oliveira De Souza, Erinaldo Pereira, Eduardo Marques
A Hardware/Software Codesign for the Chemical Reactivity of BRAMS. DSD (2017)
André B. Perina, Paulo Matias, Eduardo Marques, Vanderlei Bonato, João Miguel Gago Pontes de Brito Lima
Exploiting Kant and Kimura's Matrix Inversion Algorithm on FPGA. DSD (2017)
José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques
Towards a multi-softcore FPGA approach for the HOG algorithm. INDIN (2016)
Leandro Andrade Martinez, Eduardo Marques
A hardware/software codesign framework for vision-based ADAS. FPL (2016)
Luiz G. A. Martins, Ricardo Nobre, João M. P. Cardoso, Alexandre C. B. Delbem, Eduardo Marques
Clustering-Based Selection for the Exploration of Compiler Optimization Sequences. ACM Trans. Archit. Code Optim. 13 (1) (2016)
José Arnaldo Mascagni de Holanda, João Manuel Paiva Cardoso, Eduardo Marques
A pipelined multi-softcore approach for the HOG algorithm. DASIP (2016)
Maikon Adiles Fernandez Bueno, Carlos R. P. Almeida Jr., José A. M. de Holanda, Eduardo Marques
Reconfigurable Hardware Assist for Linux Process Scheduling in Heterogeneous Multicore SoCs. ARC (2015)
Hervé Paulino, Eduardo Marques
Heterogeneous programming with Single Operation Multiple Data. J. Comput. Syst. Sci. 81 (1) (2015)
Cristiano Bacelar de Oliveira, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques
A special-purpose language for implementing pipelined FPGA-based accelerators. FDL (2015)
Vanderlei Bonato, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo Marques
Practical Education Fostered by Research Projects in an Embedded Systems Course. Int. J. Reconfigurable Comput. 2014 (2014)
Maikon Adiles Fernandez Bueno, José A. M. de Holanda, Erinaldo Pereira, Eduardo Marques
Operating system support to an online hardware-software co-design scheduler for heterogeneous multicore architectures. RTCSA (2014)
Jecel Mattos de Assumpção Jr., Merik Voswinkel, Eduardo Marques
Adapting Processor Grain via Reconfiguration. ARC (2014)
Cristiano Bacelar de Oliveira, João M. P. Cardoso, Eduardo Marques
High-Level Synthesis from C vs. a DSL-Based Approach. IPDPS Workshops (2014)
Victor Adriel de J. Oliveira, Eduardo Marques, Rodrigo de Lemos Peroni, Anderson Maciel
Tactile Interface for Navigation in Underground Mines. SVR (2014)
Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso
A clustering-based approach for exploring sequences of compiler optimizations. IEEE Congress on Evolutionary Computation (2014)
Luiz G. A. Martins, Ricardo Nobre, Alexandre C. B. Delbem, Eduardo Marques, João M. P. Cardoso
Exploration of compiler optimization sequences using clustering-based selection. LCTES (2014)
Hervé Paulino, Eduardo Marques
Heterogeneous Programming with Single Operation Multiple Data. CoRR (2013)
Vanderlei Bonato, Bruno F. Mazzotti, Marcio Merino Fernandes, Eduardo Marques
A Mersenne Twister Hardware Implementation for the Monte Carlo Localization Algorithm. J. Signal Process. Syst. 70 (1) (2013)
Luiz G. A. Martins, Eduardo Marques
Design Space Exploration based on multiobjective genetic algorithms and clustering-based high-level estimation. FPL (2013)
Eduardo Marques, Hervé Paulino
Single Operation Multiple Data - Data Parallelism at Subroutine Level. HPCC-ICESS (2012)
Eduardo Marques, Valter Balegas, Bruno Fontes Barroca, Ankica Barisic, Vasco Amaral
The RPG DSL: a case study of language engineering using MDD for generating RPG games for mobile phones. DSM@SPLASH (2012)
Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
LALP: A Language to Program Custom FPGA-Based Acceleration Engines. Int. J. Parallel Program. 40 (3) (2012)
Cristiano B. Oliveira, Eduardo Marques
Combining data and computation transformations for fine-grain reconfigurable architectures. FPL (2012)
Drausio Linardi Rossi, Vanderlei Bonato, Eduardo Marques, João Miguel Gago Pontes de Brito Lima
A PID Controller Applied to the Gain Control of a CMOS Camera Using Reconfigurable Computing. ReConFig (2011)
Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
Automatic generation of FPGA hardware accelerators using a domain specific language. FPL (2009)
Vanderlei Bonato, Eduardo Marques
RoboArch: A component-based tool proposal for developing hardware architecture for mobile robots. SIES (2009)
Ricardo Menotti, João M. P. Cardoso, Marcio Merino Fernandes, Eduardo Marques
LALP: A Novel Language to Program Custom FPGA-Based Architectures. SBAC-PAD (2009)
Vanderlei Bonato, Eduardo Marques, George A. Constantinides
A Floating-point Extended Kalman Filter Implementation for Autonomous Mobile Robots. J. Signal Process. Syst. 56 (1) (2009)
Vanderlei Bonato, Eduardo Marques, George A. Constantinides
A Parallel Hardware Architecture for Image Feature Detection. ARC (2008)
Vanderlei Bonato, Eduardo Marques, George A. Constantinides
A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection. IEEE Trans. Circuits Syst. Video Technol. 18 (12) (2008)
Vanderlei Bonato, Eduardo Marques, George A. Constantinides
A floating-point Extended Kalman Filter implementation for autonomous mobile robots. FPL (2007)
Ricardo Menotti, Eduardo Marques, João M. P. Cardoso
Aggressive Loop Pipelining for Reconfigurable Architectures. FPL (2007)
Jecel Assumpcao, Denis F. Wolf, Eduardo Marques
Towards a Hardware Accelerated Obstacle Avoidance System for Mobile Robots using Monocular Vision. SIES (2007)
Vanderlei Bonato, Rafael Peron, Denis F. Wolf, José A. M. de Holanda, Eduardo Marques, João M. P. Cardoso
An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics. SIES (2007)
José A. M. de Holanda, Jecel Assumpcao, Denis F. Wolf, Eduardo Marques, João M. P. Cardoso
On Adapting Power Estimation Models for Embedded Soft-Core Processors. SIES (2007)
Vanderlei Bonato, José A. M. de Holanda, Eduardo Marques
An Embedded Multi-camera System for Simultaneous Localization and Mapping. ARC (2006)
Jorge Luiz e Silva, Eduardo Marques
Executing Algorithms for Dynamic Dataflow Reconfigurable Hardware -The Operators Protocol. ReConFig (2006)
João Miguel Gago Pontes de Brito Lima, Ricardo Menotti, João M. P. Cardoso, Eduardo Marques
A Methodology to Design FPGA-based PID Controllers. SMC (2006)
Vanderlei Bonato, Ricardo Menotti, Eduardo do Valle Simões, Marcio Merino Fernandes, Eduardo Marques
Teaching embedded systems with FPGAs throughout a computer science course. WCAE (2004)
Vanderlei Bonato, Adriano K. Sanches, Marcio Merino Fernandes, João M. P. Cardoso, Eduardo do Valle Simões, Eduardo Marques
A Real Time Gesture Recognition System for Mobile Robots. ICINCO (2) (2004)
R. A. Gonçalves, P. A. Moraes, João M. P. Cardoso, Denis F. Wolf, Marcio Merino Fernandes, Roseli A. Francelin Romero, Eduardo Marques
ARCHITECT-R: A System for Reconfigurable Robots Design. SAC (2003)
Ana Cristina Bicharra Garcia, Eduardo Marques
Web Navigation Patterns. ICEIS (4) (2003)
Donald L. Hung, Antonio Arsgao, Jorge L. Silva, Eduardo Marques, Karl Hillesland
UB1 - a recurrent neural network based parallel machine for solving simultaneous linear equations. SBRN (1997)
Claudio Kirner, Eduardo Marques
Design of a distributed system support based on a centralized parallel bus. SIGARCH Comput. Archit. News 14 (4) (1986)