David L. Andrews

Publication Activity (10 Years)

Years Active: 1991-2021
Publications (10 Years): 4

Top Topics

Generally Applicable

Distributed Shared Memory

Energy Efficiency

Tensor Analysis

Top Venues

Publications

David L. Andrews
Symmetry and Quantum Features in Optical Vortices. Symmetry 13 (8) (2021)
David L. Andrews
Irreducible Cartesian Tensor Analysis of Harmonic Scattering from Chiral Fluids. Symmetry 12 (9) (2020)
David L. Andrews
Symmetries, Conserved Properties, Tensor Representations, and Irreducible Forms in Molecular Quantum Electrodynamics. Symmetry 10 (7) (2018)
Hongyuan Ding, Sen Ma, Miaoqing Huang, David L. Andrews
OOGen: An Automated Generation Tool for Custom MPSoC Architectures Based on Object-Oriented Programming Methods. IPDPS Workshops (2016)
Sen Ma, Hongyuan Ding, Miaoqing Huang, David L. Andrews
Archborn: an open source tool for automated generation of chip heterogeneous multiprocessor architectures. ReConFig (2015)
Sen Ma, Zeyad Aklah, David L. Andrews
A run time interpretation approach for creating custom accelerators. FPL (2015)
Sen Ma, David L. Andrews
On energy efficiency and amdahl's law in FPGA based chip heterogeneous multiprocessor systems (abstract only). FPGA (2014)
Eugene Cartwright, Alborz Sadeghian, Sen Ma, David L. Andrews
Achieving portability and efficiency over chip heterogeneous multiprocessor systems. FPL (2014)
Miaoqing Huang, David L. Andrews
Modular Design of Fully Pipelined Reduction Circuits on FPGAs. IEEE Trans. Parallel Distributed Syst. 24 (9) (2013)
Sen Ma, Miaoqing Huang, Eugene Cartwright, David L. Andrews
Scalable Memory Hierarchies for Embedded Manycore Systems. ARC (2012)
Sen Ma, Miaoqing Huang, David L. Andrews
Developing application-specific multiprocessor platforms on FPGAs. ReConFig (2012)
Eugene Cartwright, Azad Fahkari, Sen Ma, Christina Smith, Miaoqing Huang, David L. Andrews, Jason Agron
Automating the design of mLUT MPSoPC FPGAs in the cloud. FPL (2012)
Jorge L. Ortiz, David L. Andrews
A Streaming High-Throughput Linear Sorter System with Contention Buffering. Int. J. Reconfigurable Comput. 2011 (2011)
Eugene Cartwright, Sen Ma, David L. Andrews, Miaoqing Huang
Creating HW/SW co-designed MPSoPC's from high level programming models. HPCS (2011)
Miaoqing Huang, David L. Andrews
Modular design of fully pipelined accumulators. FPT (2010)
Jason Agron, David L. Andrews
Distributed Hardware-Based Microkernels: Making Heterogeneous OS Functionality a System Primitive. FCCM (2010)
Jorge L. Ortiz, David L. Andrews
A configurable high-throughput linear sorter system. IPDPS Workshops (2010)
Miaoqing Huang, David L. Andrews, Jason Agron
Operating System Structures for Multiprocessor Systems on Programmable Chip. ReConFig (2010)
Jason Agron, David L. Andrews
Hardware Microkernels for Heterogeneous Manycore Systems. ICPP Workshops (2009)
Jason Agron, David L. Andrews
Building heterogeneous reconfigurable systems with a hardware microkernel. CODES+ISSS (2009)
Jason Agron, David L. Andrews
Building heterogeneous reconfigurable systems using threads. FPL (2009)
Elias Teodoro Silva Jr., David L. Andrews, Carlos Eduardo Pereira, Flávio Rech Wagner
An Infrastructure for Hardware-Software Co-Design of Embedded Real-Time Java Applications. ISORC (2008)
Shane Santner, Wesley Peck, Jason Agron, David L. Andrews
Symmetric Multiprocessor Design for Hybrid CPU/FPGA SoCs. ARC (2008)
David L. Andrews, Jason Agron
Modeling Abstractions for Next Generation Reconfigurable Computing. ERSA (2008)
David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. Very Large Scale Integr. Syst. 16 (1) (2008)
Erik K. Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews
Memory Hierarchy for MCSoPC Multithreaded Systems. ERSA (2007)
Erik K. Anderson, Wesley Peck, Jim Stevens, Jason Agron, Fabrice Baijot, Seth Warn, David L. Andrews
Supporting High Level Language Semantics Within Hardware Resident Threads. FPL (2007)
Jason Agron, Wesley Peck, Erik K. Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens
Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS (2006)
David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
The Case for High Level Programming Models for Reconfigurable Computers. ERSA (2006)
Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews
Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM (2006)
Wesley Peck, Erik K. Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David L. Andrews
Hthreads: A Computational Model for Reconfigurable Devices. FPL (2006)
Razali Jidin, David L. Andrews, Wesley Peck, Dan Chirpich, Kevin Stout, John M. Gauch
Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms. IPDPS (2005)
Razali Jidin, David L. Andrews, Douglas Niehaus
Implementing Multi Threaded System Support for Hybrid FPGA/CPU Computational Components. ERSA (2004)
David L. Andrews, Douglas Niehaus, Peter J. Ashenden
Programming Models for Hybrid CPU/FPGA Chips. Computer 37 (1) (2004)
David L. Andrews, Douglas Niehaus, Razali Jidin, Michael Finley, Wesley Peck, Michael Frisbie, Jorge L. Ortiz, Ed Komp, Peter J. Ashenden
Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. IEEE Micro 24 (4) (2004)
Douglas Niehaus, David L. Andrews
Using the Multi-Threaded Computation Model as a Unifying Framework for Hardware-Software Co-Design and Implementation. WORDS Fall (2003)
David L. Andrews, Douglas Niehaus
Architectural Frameworks for MPP Systems on a Chip. IPDPS (2003)
David L. Andrews, Joe Evans, Venumadhav Mangipudi, Aditya Mandapaka
SCIMPS: An Integrated Approach to Distributed Processing in Sensor Webs. IPDPS (2003)
David L. Andrews, Paul Austin, Peter Costello, David O. LeVan
Interprocess communications in the AN/BSY-2 distributed computer system: a case study. J. Syst. Softw. 61 (3) (2002)
David L. Andrews, Lonnie R. Welch, David M. Chelberg, Scott A. Brandt
A Framework for Using Benefit Functions In Complex Real Time Systems. IPDPS (2002)
David L. Andrews, Ravi Vemuri, David M. Chelberg, David Fleeman, David Parrott, Lonnie R. Welch, Scott A. Brandt
A Framework for using benefit functions in complex real-time systems. Scalable Comput. Pract. Exp. 5 (1) (2002)
David L. Andrews, Mitchell A. Thornton
Integration of CAD tools and structured design principles in an undergraduate computer engineering curriculum. WCAE@ISCA (1998)
Mitchell A. Thornton, David L. Andrews
Graph Analysis and Transformation Techniques for Runtime Minimization in Multi-Threaded Architectures. HICSS (1) (1997)
William H. Mangione-Smith, Brad Hutchins, David L. Andrews, André DeHon, Carl Ebeling, Reiner W. Hartenstein, Oskar Mencer, John Morris, Krishna V. Palem, Viktor K. Prasanna, Henk A. E. Spaanenburg
Seeking Solutions in Configurable Computing. Computer 30 (12) (1997)
David L. Andrews, Andrew Wheeler, Barry Wealand, Cliff Kancler
Rapid prototype of a hardware emulator for a SIMD processor array. ED&TC (1995)
David L. Andrews, Andrew Wheeler, Barry Wealand, Cliff Kancler
Rapid prototype of an SIMD processor array (using FPGA's). RSP (1994)
Daniel Pease, Arif Ghafoor, Ishfaq Ahmad, David L. Andrews, Kamal Foudil-Bey, Thomas E. Karpinski, Mohammad A. Mikki, Mohamed Zerrouki
PAWS: A Performance Evaluation Tool for Parallel Computing Systems. Computer 24 (1) (1991)