Razali Jidin

Publication Activity (10 Years)

Years Active: 2004-2019
Publications (10 Years): 2

Top Topics

Hardware Architecture

Flow Estimation

Top Venues

Comput. Electr. Eng.

Publications

Razali Jidin, M. Reyasudin Basir Khan, Norziana Jamil, Ibrahim Al-Bahadly
Prospective Control Systems and Cyber-Securities for Electrical Secondary Substations. ICCSCE (2019)
Haider Ismael Shahadi, Razali Jidin, Wong Hung Way
Concurrent hardware architecture for dual-mode audio steganography processor-based FPGA. Comput. Electr. Eng. 49 (2016)
Razali Jidin, Abdul Bahari Othman
Cascade hydroelectric scheme: River flow estimation for reservoir regulation improvement and flood-risk mitigation. ICCSCE (2015)
Saad Al-Azawi, Yasir Amer Abbas, Razali Jidin
Low complexity multidimensional CDF 5/3 DWT architecture. CSNDSP (2014)
Liang Wei, S. C. Mukhopadhyay, Razali Jidin, Chia-Pang Chen
Multi-source information fusion for drowsy driving detection based on wireless sensor networks. ICST (2013)
Haider Ismael Shahadi, Razali Jidin
High capacity and inaudibility audio steganography scheme. IAS (2011)
Syed Zahurul, Syed Zahidul, Razali Jidin
An Adept Edge Detection Algorithm for Human Knee Osteoarthritis Images. ICSAP (2010)
Syed Zahidul Islam, Mohd. Alauddin Mohd. Ali, Razali Jidin, Syed Zahurul Islam
Embedded system based driver drowsiness detection system. ICDIP (2010)
Razali Jidin, David L. Andrews, Wesley Peck, Dan Chirpich, Kevin Stout, John M. Gauch
Evaluation of the Hybrid Multithreading Programming Model using Image Processing Transforms. IPDPS (2005)
Razali Jidin, David L. Andrews, Douglas Niehaus
Implementing Multi Threaded System Support for Hybrid FPGA/CPU Computational Components. ERSA (2004)
David L. Andrews, Douglas Niehaus, Razali Jidin, Michael Finley, Wesley Peck, Michael Frisbie, Jorge L. Ortiz, Ed Komp, Peter J. Ashenden
Programming Models for Hybrid FPGA-CPU Computational Components: A Missing Link. IEEE Micro 24 (4) (2004)