Ron Sass

Publication Activity (10 Years)

Years Active: 1993-2019
Publications (10 Years): 2

Top Topics

Memory Subsystem

Ibm Zenterprise

Top Venues

Euro-Par Workshops

Publications

Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt
Volcan: System Integration of HLS and HMC on FPGAs. ReConFig (2019)
Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt, Matthew French
Bridging the Gap between Advanced Memory and Heterogeneous Architectures. FCCM (2018)
Yamuna Rajasekhar, Ron Sass
Architecture and applications for an All-FPGA parallel computer. Clust. Comput. 17 (2) (2014)
Shweta Jain-Mendon, Ron Sass
A hardware-software co-design approach for implementing sparse matrix vector multiplication on FPGAs. Microprocess. Microsystems 38 (8) (2014)
Jürgen Becker, Ramachandran Vaidyanathan, Marco D. Santambrogio, Jim Tørresen, Ron Sass, Philip Heng Wai Leong
RAW Introduction and Committees. IPDPS Workshops (2014)
Bin Huang, Ron Sass, Nathan DeBardeleben, Sean Blanchard
Harnessing Unreliable Cores in Heterogeneous Architecture: The PyDac Programming Model and Runtime. DSN (2014)
Yamuna Rajasekhar, Ron Sass
A Novel Memory Subsystem and Computational Model for Parallel Reconfigurable Architectures. Euro-Par Workshops (2013)
Scott Buscemi, William V. Kritikos, Ron Sass
A Range and Scaling Study of an FPGA-Based Digital Wireless Channel Emulator. FCCM (2013)
Shanyuan Gao, Bin Huang, Ron Sass
The Impact of Hardware Communication on a Heterogeneous Computing System. FCCM (2013)
Bin Huang, Ron Sass, Nathan DeBardeleben, Sean Blanchard
PyDac: A Resilient Run-Time Framework for Divide-and-Conquer Applications on a Heterogeneous Many-Core Architecture. Euro-Par Workshops (2013)
Shweta Jain-Mendon, Ron Sass
Performance evaluation of Sparse Matrix-Matrix Multiplication. FPL (2013)
Scott Buscemi, Ron Sass
Design and utilization of an FPGA cluster to implement a Digital Wireless Channel Emulator. FPL (2012)
Claudia Feregrino, Miguel Arias, Kris Gaj, Viktor K. Prasanna, Marco D. Santambrogio, Ron Sass
Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). Int. J. Reconfigurable Comput. 2012 (2012)
Andrew G. Schmidt, Siddhartha Datta, Ashwin A. Mendon, Ron Sass
Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. Parallel Comput. 38 (8) (2012)
Andrew G. Schmidt, Neil Steiner, Matthew French, Ron Sass
HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. Int. J. Reconfigurable Comput. 2012 (2012)
William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French
Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfigurable Comput. 2012 (2012)
Shweta Jain-Mendon, Ron Sass
A case study of streaming storage format for sparse matrices. ReConFig (2012)
Andrew G. Schmidt, William V. Kritikos, Shanyuan Gao, Ron Sass
An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. Int. J. Reconfigurable Comput. 2012 (2012)
Yamuna Rajasekhar, Ron Sass
Architecture and Applications for an All-FPGA Parallel Computer. ICPP Workshops (2012)
Yamuna Rajasekhar, Rahul R. Sharma, Ron Sass
An Extensible and Portable Tool Suite for Managing Multi-Node FPGA Systems. FCCM (2012)
Ashwin A. Mendon, Ron Sass, Zachary K. Baker, Justin L. Tripp
Design and implementation of a hardware checkpoint/restart core. DSN Workshops (2012)
Rahul R. Sharma, Yamuna Rajasekhar, Ron Sass
Exploring hardware work queue support for lightweight threads in MPSoCs. ReConFig (2012)
Ashwin A. Mendon, Bin Huang, Ron Sass
A high performance, open source SATA2 core. FPL (2012)
Andrew G. Schmidt, Ron Sass
Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. ReConFig (2011)
Andrew G. Schmidt, Bin Huang, Ron Sass, Matthew French
Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. FCCM (2011)
Scott Buscemi, Ron Sass
Design of a scalable digital Wireless Channel Emulator for networking radios. MILCOM (2011)
Ron Sass, Andrew G. Schmidt, Scott Buscemi
Reconfigurable Computing Cluster - A Five-Year Perspective of the Project. PARCO (2011)
William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass
A Radix Tree Router for Scalable FPGA Networks. FPL (2011)
Shanyuan Gao, Andrew G. Schmidt, Ron Sass
Impact of reconfigurable hardware on accelerating MPI_Reduce. FPT (2010)
Bin Huang, Andrew G. Schmidt, Ashwin A. Mendon, Ron Sass
Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. HPRCTA@SC (2010)
Robin Pottathuparambil, Ron Sass
FPGA-based three-body molecular dynamics simulator. HPCS (2010)
Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French
Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig (2010)
Siddhartha Datta, Ron Sass
Scalability Studies of the BLASTn Scan and Ungapped Extension Functions. ReConFig (2009)
Ashwin A. Mendon, Andrew G. Schmidt, Ron Sass
A Hardware Filesystem Implementation with Multidisk Support. Int. J. Reconfigurable Comput. 2009 (2009)
Nathan DeBardeleben, Ron Sass, Daniel C. Stanzione Jr., Walter B. Ligon III
Building problem-solving environments with the Arches framework. J. Syst. Softw. 82 (7) (2009)
Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass
AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. FCCM (2009)
Shanyuan Gao, Andrew G. Schmidt, Ron Sass
Hardware implementation of MPI_Barrier on an FPGA cluster. FPL (2009)
Robin Pottathuparambil, Ron Sass
A parallel/vectorized double-precision exponential core to accelerate computational science applications. FPGA (2009)
Siddhartha Datta, Parag Beeraka, Ron Sass
RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function. FCCM (2009)
Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass
FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM (2008)
Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass
Reconfigurable Computing Cluster Project: Phase I Brief. FCCM (2008)
Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass
Teaching FPGA system design via a remote laboratory facility. FPL (2008)
Ashwin A. Mendon, Ron Sass
A Hardware Filesystem Implementation for High-Speed Secondary Storage. ReConFig (2008)
David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. Very Large Scale Integr. Syst. 16 (1) (2008)
Andrew G. Schmidt, Ron Sass
Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. FPL (2007)
Andrew G. Schmidt, Ron Sass
Quantifying Effective Memory Bandwidth of Platform FPGAs. FCCM (2007)
Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM (2007)
Kushal Datta, Ron Sass
RBoot: Software Infrastructure for a Remote FPGA Laboratory. FCCM (2007)
Jason Agron, Wesley Peck, Erik K. Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens
Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS (2006)
David L. Andrews, Ron Sass, Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp
The Case for High Level Programming Models for Reconfigurable Computers. ERSA (2006)
Erik K. Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews
Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM (2006)
Ron Sass, Brian Greskamp, Brian Leonard, Jeff Young, Srinivas Beeravolu
Online architectures: A theoretical formulation and experimental prototype. Microprocess. Microsystems 30 (6) (2006)
Krishna Muriki, Keith D. Underwood, Ron Sass
RC-BLAST: Towards a Portable, Cost-Effective Open Source Hardware Implementation. IPDPS (2005)
Brian Greskamp, Ron Sass
A Virtual Machine for Merit-Based Runtime Reconfiguration. FCCM (2005)
Pradeep Nalabalapu, Ron Sass
Bandwidth Management with a Reconfigurable Data Cache. IPDPS (2005)
Ranjesh G. Jaganathan, Matthew Simpson, Ron Sass
Automatic discovery, selection, and specialization of modules in RCADE. FPGA (2004)
Jeff Young, Ron Sass
FERP Interface and Interconnect Cores for Stream Processing Applications. EUC (2004)
Nathan DeBardeleben, Walter B. Ligon III, Ron Sass
Arches: An Infrastructure for PSE Development. HIPS (2004)
Brian Leonard, Jeff Young, Ron Sass
Online placement infrastructure to support run-time reconfiguration. FPGA (2004)
Ranjesh G. Jaganathan, Keith D. Underwood, Ron Sass
A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. SC (2003)
Keith D. Underwood, Walter B. Ligon III, Ron Sass
Analysis of a prototype intelligent network interface. Concurr. Comput. Pract. Exp. 15 (7-8) (2003)
Shyamnath Harinath, Ron Sass
Reconfigurable Mapping Functions for Online Architectures. IPDPS (2003)
Keith D. Underwood, Ron Sass, Walter B. Ligon III
A Reconfigurable Extension to the Network Interface of Beowulf Clusters. CLUSTER (2001)
Marwan Krunz, Ron Sass, Herman D. Hughes
Statistical Characteristics and Multiplexing of MPEG Streams. INFOCOM (1995)
Ron Sass, Matt W. Mutka
Enabling unimodular transformations. SC (1994)
Ron Sass, Matt W. Mutka
Transformations on Doubly Nested Loops. IFIP PACT (1994)
Chi-Ming Chiang, Qiang Du, Matt W. Mutka, Ron Sass
An Empirical Study of Scalable Domain Decomposition Methods for a 2-D Parabolic Equation Solver. PPSC (1993)