A hardware-software co-design approach for implementing sparse matrix vector multiplication on FPGAs.
Shweta Jain-MendonRon SassPublished in: Microprocess. Microsystems (2014)
Keyphrases
- sparse matrix
- field programmable gate array
- hardware software co design
- floating point
- hardware and software
- hardware software
- embedded systems
- hardware implementation
- parallel computing
- hw sw
- hardware design
- image processing algorithms
- random projections
- computing systems
- efficient implementation
- fixed point
- rows and columns
- computer systems
- general purpose
- least squares
- data sets
- random sampling
- arithmetic operations
- dimensionality reduction