Brent E. Nelson

Publication Activity (10 Years)

Years Active: 1984-2019
Publications (10 Years): 8

Top Topics

Efficient Processing

Fpga Technology

Top Venues

Publications

Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin
Maverick: A Stand-alone CAD Flow for Xilinx 7-Series FPGAs. FPGA (2019)
Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin
Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules. FCCM (2019)
Brent E. Nelson
Third Party CAD Tools for FPGA Design - A Survey of the Current Landscape. ARC (2019)
Thomas Townsend, Brent E. Nelson
Vivado design interface: An export/import capability for Vivado FPGA designs. FPL (2017)
Thomas Townsend, Brent E. Nelson, Michael J. Wirthlin
An XDL alternative for interfacing RapidSmith and Vivado. FPL (2016)
Luke Newmeyer, Doran Wilde, Brent E. Nelson, Michael J. Wirthlin
Efficient processing of phased array radar in sense and avoid application using heterogeneous computing. FPL (2016)
Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings
Packing a modern Xilinx FPGA using RapidSmith. ReConFig (2016)
Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings
RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs. FPGA (2015)
Brad White, Brent E. Nelson
Tincr - A custom CAD tool framework for Vivado. ReConFig (2014)
Christopher Lavin, Brent E. Nelson, Brad L. Hutchings
Impact of hard macro size on FPGA clock rate and place/route time. FPL (2013)
Christopher Lavin, Brent E. Nelson, Brad L. Hutchings
Improving clock-rate of hard-macro designs. FPT (2013)
Travis Haroldsen, Brent E. Nelson, Brad White
Rapid FPGA design prototyping through preservation of system logic: A case study. FPL (2013)
Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs. FPL (2011)
Subhrashankha Ghosh, Brent E. Nelson
XDL-Based Module Generators for Rapid FPGA Design Implementation. FPL (2011)
Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping. FCCM (2011)
Dah-Jye Lee, Paul C. Merrell, Zhaoyi Wei, Brent E. Nelson
Two-frame structure from motion using optical flow probability distributions for unmanned air vehicle obstacle avoidance. Mach. Vis. Appl. 21 (3) (2010)
Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin
Using Hard Macros to Reduce FPGA Compilation Time. FPL (2010)
Adam Arnesen, Kevin Ellsworth, Derrick Gibelyou, Travis Haroldsen, Jared Havican, Marc Padilla, Brent E. Nelson, Michael Rice, Michael J. Wirthlin
Increasing Design Productivity through Core Reuse, Meta-data Encapsulation, and Synthesis. FPL (2010)
Christopher Lavin, Marc Padilla, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
Rapid prototyping tools for FPGA designs: RapidSmith. FPT (2010)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald
Hardware-Friendly Vision Algorithms for Embedded Obstacle Detection Applications. IEEE Trans. Circuits Syst. Video Technol. 20 (11) (2010)
John Bodily, Brent E. Nelson, Zhaoyi Wei, Dah-Jye Lee, Jeff Chase
A Comparison Study on Implementing Optical Flow and Digital Communications on FPGAs and GPUs. ACM Trans. Reconfigurable Technol. Syst. 3 (2) (2010)
Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis
Comparing fine-grained performance on the Ambric MPPA against an FPGA. FPL (2009)
Brent E. Nelson
FPGA Design Productivity - A Discussion of the State of the Art and a Research Agenda. ARC (2009)
Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). FCCM (2009)
Dah-Jye Lee, Paul C. Merrell, Brent E. Nelson, Zhaoyi Wei
Multi-frame structure from motion using optical flow probability distributions. Neurocomputing 72 (4-6) (2009)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Kirt D. Lillywhite
Accurate Optical Flow Sensor for Obstacle Avoidance. ISVC (1) (2008)
Jeff Chase, Brent E. Nelson, John Bodily, Zhaoyi Wei, Dah-Jye Lee
Real-Time Optical Flow Calculations on FPGA and GPU Architectures: A Comparison Study. FCCM (2008)
Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn A. Bohner
Design Productivity for Configurable Computing. ERSA (2008)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald
Real-time accurate optical flow-based motion sensor. ICPR (2008)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, James K. Archibald, Barrett Edwards
FPGA-Based Embedded Motion Estimation Sensor. Int. J. Reconfigurable Comput. 2008 (2008)
Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin
Design, Debug, Deploy: The Creation of Configurable Computing Applications. J. Signal Process. Syst. 53 (1-2) (2008)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson
FPGA-based Real-time Optical Flow Algorithm Design and Implementation. J. Multim. 2 (5) (2007)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson, Michael Martineau
A Fast and Accurate Tensor-based Optical Flow Algorithm Implemented in FPGA. WACV (2007)
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson
A Hardware-Friendly Adaptive Tensor Based Optical Flow Algorithm. ISVC (2) (2007)
Brent E. Nelson
The Mythical CCM: In Search of Usable (and Resuable) FPGA-Based General Computing Machines. ASAP (2006)
Bryan Catanzaro, Brent E. Nelson
Higher Radix Floating-Point Representations for FPGA-Based Arithmetic. FCCM (2005)
Bryan Catanzaro, Brent E. Nelson
Choice of base revisited: higher radices for FPGA-based floating-point computation (abstract only). FPGA (2005)
Clint Hilton, Brent E. Nelson
A Flexible Circuit-Switched NOC for FPGA-Based Systems. FPL (2005)
Joseph M. Palmer, Brent E. Nelson
A Parallel FFT Architecture for FPGAs. FPL (2004)
Brad L. Hutchings, Brent E. Nelson
GigaOp DSP on FPGA. J. VLSI Signal Process. 36 (1) (2004)
Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner
JHDLBits: The Merging of Two Worlds. FPL (2004)
Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings
Reconfigurable Computing Application Frameworks. FCCM (2003)
Xiaojun Wang, Brent E. Nelson
Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs. FCCM (2003)
Eric Roesler, Brent E. Nelson
Novel Optimizations for Hardware Floating-Point Units in a Modern FPGA Architecture. FPL (2002)
Eric Roesler, Brent E. Nelson
Debug methods for hybrid CPU/FPGA systems. FPT (2002)
Brad L. Hutchings, Brent E. Nelson
Unifying simulation and execution in a design environment for FPGA systems. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
Brad L. Hutchings, Brent E. Nelson
Gigaop DSP on FPGA. ICASSP (2001)
Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings
Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. FPL (2001)
Paul S. Graham, Brent E. Nelson, Brad L. Hutchings
Instrumenting Bitstreams for Debugging FPGA Circuits. FCCM (2001)
Paul S. Graham, Brad L. Hutchings, Brent E. Nelson
Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. FCCM (2000)
Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin
Designing and Debugging Custom Computing Applications. IEEE Des. Test Comput. 17 (1) (2000)
Stephen M. Scalera, Mark Falco, Brent E. Nelson
A Reconfigurable Computing Architecture for Microsensors. FCCM (2000)
Brad L. Hutchings, Brent E. Nelson
Using general-purpose programming languages for FPGA design. DAC (2000)
Gregory C. Ahlquist, Michael Rice, Brent E. Nelson
Error control coding in software radios: an FPGA approach. IEEE Wirel. Commun. 6 (4) (1999)
Gregory C. Ahlquist, Brent E. Nelson, Michael Rice
Optimal Finite Field Multipliers for FPGAs. FPL (1999)
Paul S. Graham, Brent E. Nelson
Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. FPL (1999)
Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting
A CAD Suite for High-Performance FPGA Design. FCCM (1999)
Paul S. Graham, Brent E. Nelson
FPGA-Based Sonar Processing. FPGA (1998)
Paul S. Graham, Brent E. Nelson
Frequency-Domain Sonar Processing in FPGAs and DSPs. FCCM (1998)
Knuth Stener Grimsrud, James K. Archibald, Richard L. Frost, Brent E. Nelson
Locality as a Visualization Tool. IEEE Trans. Computers 45 (11) (1996)
Paul S. Graham, Brent E. Nelson
Genetic algorithms in software and in hardware-a performance analysis of workstation and custom computing machine implementations. FCCM (1996)
Brent E. Nelson, Gregory D. Thompson, J. Kelly Flanagan
Transaction Processing Workloads - A Comparison to the SPEC Benchmarks Using Memory Hierarchy Performance Studies. MASCOTS (1996)
J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Gregory D. Thompson
The Inaccuracy of Trace-Driven Simulation Using Incomplete Mulitprogramming Trace Data. MASCOTS (1996)
Paul S. Graham, Brent E. Nelson
A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2. FPL (1995)
Knuth Stener Grimsrud, James K. Archibald, Richard L. Frost, Brent E. Nelson
On the Accuracy of Memory Reference Models. Computer Performance Evaluation (1994)
Robert B. Smith, James K. Archibald, Brent E. Nelson
Evaluating Performance of Prefetching Second Level Caches. SIGMETRICS Perform. Evaluation Rev. 20 (4) (1993)
Knuth Stener Grimsrud, James K. Archibald, M. Ripley, J. Kelly Flanagan, Brent E. Nelson
BACH: a hardware monitor for tracing microprocessor-based systems. Microprocess. Microsystems 17 (8) (1993)
J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Knuth Stener Grimsrud
Incomplete Trace Data and Trace Driven Simulation. MASCOTS (1993)
Knuth Stener Grimsrud, James K. Archibald, Brent E. Nelson
Multiple Prefetch Adaptive Disk Caching. IEEE Trans. Knowl. Data Eng. 5 (1) (1993)
Brent E. Nelson, James K. Archibald, J. Kelly Flanagan
Performance analysis of inclusion effects in multi-level multiprocessor caches. SPDP (1991)
J. Kelly Flanagan, Darryl Morrell, Richard L. Frost, Christopher J. Read, Brent E. Nelson
Vector quantization codebook generation using simulated annealing. ICASSP (1989)
J. Kelly Flanagan, Brent E. Nelson
Processor design using path programmable logic. ICCD (1988)
Tao Li, Brent E. Nelson, J. Kelly Flanagan, Christopher J. Read
A multiprogrammed parallel architecture for digital signal processing. ICASSP (1987)
Brent E. Nelson, Christopher J. Read
A bit-serial VLSI vector quantizer. ICASSP (1986)
Elliott I. Organick, Tony M. Carter, Mike P. Maloney, Alan L. Davis, Alan B. Hayes, Dan Klass, Gary Lindstrom, Brent E. Nelson, Kent F. Smith
Transforming an Ada Program Unit to Silicon and Verifying Its Behavior in an Ada Environment: A first Experiment. IEEE Softw. 1 (1) (1984)
Tony M. Carter, Alan L. Davis, Alan B. Hayes, Gary Lindstrom, Dan Klass, Mike P. Maloney, Brent E. Nelson, Elliott I. Organick, Kent F. Smith
Transforming an Ada Program Unit to Silicon and Testing It in an Ada Environment. COMPCON (1984)
Lee A. Hollaar, Brent E. Nelson, Tony M. Carter, Raymond A. Lorie
The structure and operation of a relational database system in a cell-oriented integrated circuit design system. DAC (1984)