J. Kelly Flanagan

Publication Activity (10 Years)

Years Active: 1987-2005
Publications (10 Years): 0

Publications

Hyrum Carroll, J. Kelly Flanagan, Satish Baniya
A Trace-Driven Simulator For Palm OS Devices. ISPASS (2005)
Myles Watson, J. Kelly Flanagan
Simulating L3 Caches in Real Time Using Hardware Accelerated Cache Simulation (HACS): A Case Study with SPECint 2000. SBAC-PAD (2002)
Niki C. Thornock, J. Kelly Flanagan
A national trace collection and distribution resource. SIGARCH Comput. Archit. News 29 (3) (2001)
Jeff Penfold, J. Kelly Flanagan
A first year computer organization course on the web: make the magic disappear. WCAE (2000)
Niki C. Thornock, J. Kelly Flanagan
Facilitating level three cache studies using set sampling. WSC (2000)
Franklin E. Sorenson, Elizabeth S. Sorenson, J. Kelly Flanagan, Heng Zhou
A System-Assisted Disk I/O Simulation Technique. MASCOTS (1999)
Mark J. Clement, Glenn Judd, Bryan S. Morse, J. Kelly Flanagan
Performance Surface Prediction for WAN-Based Clusters. J. Supercomput. 13 (3) (1999)
Mark J. Clement, Glenn Judd, Joy L. Peterson, Bryan S. Morse, J. Kelly Flanagan
Performance Surface Prediction for WAN-Based Clusters. HICSS (7) (1998)
J. Kelly Flanagan, James K. Archibald, Jun Su
Low-power memory hierarchies: an argument for second-level caches. Microprocess. Microsystems 21 (5) (1998)
Mark J. Clement, Bryan S. Morse, J. Kelly Flanagan, Wei Wei, Phyllis E. Crandall
The Chordal Spoke ATM Interconnection Network. PDPTA (1997)
Niki C. Thornock, Xiao-Hong Tu, J. Kelly Flanagan
A Stochastic Disk I/O Simulation Technique. WSC (1997)
Mark J. Clement, J. Kelly Flanagan, Michael R. Steed
Cost Optimal Analysis for Workstation Clusters. PDPTA (1996)
Charlton D. Rose, J. Kelly Flanagan
Constructing instruction traces from cache-filtered address traces (CITCAT). SIGARCH Comput. Archit. News 24 (5) (1996)
Brent E. Nelson, Gregory D. Thompson, J. Kelly Flanagan
Transaction Processing Workloads - A Comparison to the SPEC Benchmarks Using Memory Hierarchy Performance Studies. MASCOTS (1996)
J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Gregory D. Thompson
The Inaccuracy of Trace-Driven Simulation Using Incomplete Mulitprogramming Trace Data. MASCOTS (1996)
Wei Wei, Mark J. Clement, J. Kelly Flanagan
The Round Table ATM Interconnection Network. PDPTA (1995)
Knuth Stener Grimsrud, James K. Archibald, M. Ripley, J. Kelly Flanagan, Brent E. Nelson
BACH: a hardware monitor for tracing microprocessor-based systems. Microprocess. Microsystems 17 (8) (1993)
J. Kelly Flanagan, Brent E. Nelson, James K. Archibald, Knuth Stener Grimsrud
Incomplete Trace Data and Trace Driven Simulation. MASCOTS (1993)
Brent E. Nelson, James K. Archibald, J. Kelly Flanagan
Performance analysis of inclusion effects in multi-level multiprocessor caches. SPDP (1991)
Christopher J. Read, Douglas M. Chabries, Richard W. Christiansen, J. Kelly Flanagan
A method for computing the DFT of vector quantized data. ICASSP (1989)
J. Kelly Flanagan, Darryl Morrell, Richard L. Frost, Christopher J. Read, Brent E. Nelson
Vector quantization codebook generation using simulated annealing. ICASSP (1989)
J. Kelly Flanagan, Brent E. Nelson
Processor design using path programmable logic. ICCD (1988)
Tao Li, Brent E. Nelson, J. Kelly Flanagan, Christopher J. Read
A multiprogrammed parallel architecture for digital signal processing. ICASSP (1987)