Low-power memory hierarchies: an argument for second-level caches.

J. Kelly Flanagan James K. Archibald Jun Su

Published in: Microprocess. Microsystems (1998)

Keyphrases

low power
power consumption
high speed
low cost
high power
single chip
power dissipation
vlsi circuits
image sensor
digital signal processing
logic circuits
power reduction
wireless transmission
real time
main memory
vlsi architecture