Brad L. Hutchings

Publication Activity (10 Years)

Years Active: 1989-2023
Publications (10 Years): 17

Top Topics

High Level Synthesis

Hardware Implementation

Hardware Architecture

Top Venues

Publications

Hayden Cook, Zephram Tripp, Brad L. Hutchings, Jeffrey Goeders
Improving the Reliability of FPGA CRO PUFs. FPL (2023)
Eli Cahill, Brad L. Hutchings, Jeffrey Goeders
Approaches for FPGA Design Assurance. ACM Trans. Reconfigurable Technol. Syst. 15 (3) (2022)
Hayden Cook, Jacob Arscott, Brent George, Tanner Gaskin, Jeffrey Goeders, Brad L. Hutchings
Inducing Non-uniform FPGA Aging Using Configuration-based Short Circuits. ACM Trans. Reconfigurable Technol. Syst. 15 (4) (2022)
Hayden Cook, Jonathan Thompson, Zephram Tripp, Brad L. Hutchings, Jeffrey Goeders
Cloning the Unclonable: Physically Cloning an FPGA Ring-Oscillator PUF. FPT (2022)
Tanner Gaskin, Hayden Cook, Wesley Stirk, Robert Lucas, Jeffrey Goeders, Brad L. Hutchings
Using Novel Configuration Techniques for Accelerated FPGA Aging. FPL (2020)
Robert Hale, Brad L. Hutchings
Preallocating Resources for Distributed Memory Based FPGA Debug. FPL (2019)
Robert Hale, Brad L. Hutchings
Enabling Low Impact, Rapid Debug for Highly Utilized FPGA Designs. FPL (2018)
Jeffrey Goeders, Tanner Gaskin, Brad L. Hutchings
Demand Driven Assembly of FPGA Configurations Using Partial Reconfiguration, Ubuntu Linux, and PYNQ. FCCM (2018)
Adam Hastings, Sean Jensen, Jeffrey Goeders, Brad L. Hutchings
Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs. IVSW (2018)
Robert Hale, Brad L. Hutchings
Distributed-Memory Based FPGA Debug: Design Timing Impact. FPT (2018)
Joshua S. Monson, Brad L. Hutchings
Enhancing debug observability for HLS-based FPGA circuits through source-to-source compilation. J. Parallel Distributed Comput. 117 (2018)
Brad L. Hutchings, Michael J. Wirthlin
Rapid implementation of a partially reconfigurable video system with PYNQ. FPL (2017)
Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings
Packing a modern Xilinx FPGA using RapidSmith. ReConFig (2016)
Joshua S. Monson, Brad L. Hutchings
Using source-to-source compilation to instrument circuits for debug with High Level Synthesis. FPT (2015)
Joshua S. Monson, Brad L. Hutchings
Using shadow pointers to trace C pointer values in FPGA circuits. ReConFig (2015)
Joshua S. Monson, Brad L. Hutchings
Using Source-Level Transformations to Improve High-Level Synthesis Debug and Validation on FPGAs. FPGA (2015)
Travis Haroldsen, Brent E. Nelson, Brad L. Hutchings
RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs. FPGA (2015)
Brad L. Hutchings, Joshua S. Monson, Danny Savory, Jared Keeley
A power side-channel-based digital to analog converterfor Xilinx FPGAs. FPGA (2014)
Joshua S. Monson, Brad L. Hutchings
New approaches for in-system debug of behaviorally-synthesized FPGA circuits. FPL (2014)
Brad L. Hutchings, Jared Keeley
Rapid Post-Map Insertion of Embedded Logic Analyzers for Xilinx FPGAs. FCCM (2014)
Christopher Lavin, Brent E. Nelson, Brad L. Hutchings
Impact of hard macro size on FPGA clock rate and place/route time. FPL (2013)
Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings
Optimization techniques for a high level synthesis implementation of the Sobel filter. ReConFig (2013)
Christopher Lavin, Brent E. Nelson, Brad L. Hutchings
Improving clock-rate of hard-macro designs. FPT (2013)
Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings
Implementing high-performance, low-power FPGA-based optical flow accelerators in C. ASAP (2013)
Jaren Lamprecht, Brad L. Hutchings
Profiling FPGA floor-planning effects on timing closure. FPL (2012)
Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings
A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform. Int. J. Reconfigurable Comput. 2012 (2012)
Peter M. Athanas, Brad L. Hutchings, Kentaro Sano
The NII Shonan Configurable Computing Workshop (NII Shonan Meeting 2012-11). NII Shonan Meet. Rep. 2012 (2012)
Peter Lieber, Brad L. Hutchings
FPGA Communication Framework. FCCM (2011)
Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
RapidSmith: Do-It-Yourself CAD Tools for Xilinx FPGAs. FPL (2011)
Christopher Lavin, Marc Padilla, Jaren Lamprecht, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
HMFlow: Accelerating FPGA Compilation with Hard Macros for Rapid Prototyping. FCCM (2011)
Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin
Using Hard Macros to Reduce FPGA Compilation Time. FPL (2010)
Christopher Lavin, Marc Padilla, Philip Lundrigan, Brent E. Nelson, Brad L. Hutchings
Rapid prototyping tools for FPGA designs: RapidSmith. FPT (2010)
Joshua S. Monson, Michael J. Wirthlin, Brad L. Hutchings
Fault Injection Results of Linux Operating on an FPGA Embedded Platform. ReConFig (2010)
Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis
Comparing fine-grained performance on the Ambric MPPA against an FPGA. FPL (2009)
Brad L. Hutchings, Brent E. Nelson, Stephen West, Reed Curtis
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA). FCCM (2009)
Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn A. Bohner
Design Productivity for Configurable Computing. ERSA (2008)
Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin
Design, Debug, Deploy: The Creation of Configurable Computing Applications. J. Signal Process. Syst. 53 (1-2) (2008)
André DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica
What is the right model for programming and using modern FPGAs? FPGA (2004)
Brad L. Hutchings, Brent E. Nelson
GigaOp DSP on FPGA. J. VLSI Signal Process. 36 (1) (2004)
K. Scott Hemmert, Brad L. Hutchings
Issues in debugging highly parallel FPGA-based applications derived from source code. ASP-DAC (2003)
Preston A. Jackson, Brad L. Hutchings, Justin L. Tripp
Simulation and Synthesis of CSP-based Interprocess Communication. FCCM (2003)
K. Scott Hemmert, Justin L. Tripp, Brad L. Hutchings, Preston A. Jackson
Source Level Debugger for the Sea Cucumber Synthesizing Compiler. FCCM (2003)
Robert Reuss, Jose L. Muñoz, Toshiaki Miyazaki, Nader Bagherzadeh, Prith Banerjee, Brad L. Hutchings, Brian Schott
Adaptive computing: what can it do, where can it go? ASP-DAC (2003)
Anthony L. Slade, Brent E. Nelson, Brad L. Hutchings
Reconfigurable Computing Application Frameworks. FCCM (2003)
Wesley J. Landaker, Michael J. Wirthlin, Brad L. Hutchings
Multitasking Hardware on the SLAAC1-V Reconfigurable Computing System. FPL (2002)
Brad L. Hutchings, R. Franklin, D. Carver
Assisting Network Intrusion Detection with Reconfigurable Hardware. FCCM (2002)
David Eppstein, Marshall W. Bern, Brad L. Hutchings
Algorithms for Coloring Quadtrees. Algorithmica 32 (1) (2002)
Justin L. Tripp, Preston A. Jackson, Brad L. Hutchings
Sea Cucumber: A Synthesizing Compiler for FPGAs. FPL (2002)
Brad L. Hutchings, Brent E. Nelson
Unifying simulation and execution in a design environment for FPGA systems. IEEE Trans. Very Large Scale Integr. Syst. 9 (1) (2001)
Michael J. Wirthlin, Brad L. Hutchings, Carl Worth
Synthesizing RTL Hardware from Java Byte Codes. FPL (2001)
K. Scott Hemmert, Brad L. Hutchings, Anshul Malvi
An Application-Specific Compiler for High-Speed Binary Image Morphology. FCCM (2001)
Brad L. Hutchings, Brent E. Nelson
Gigaop DSP on FPGA. ICASSP (2001)
Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings
Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. FPL (2001)
Paul S. Graham, Brent E. Nelson, Brad L. Hutchings
Instrumenting Bitstreams for Debugging FPGA Circuits. FCCM (2001)
Peter Bellows, Brad L. Hutchings
Designing Run-Time Reconfigurable Systems with JHDL. J. VLSI Signal Process. 28 (1-2) (2001)
Paul S. Graham, Brad L. Hutchings, Brent E. Nelson
Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. FCCM (2000)
Brad L. Hutchings, Brent E. Nelson, Michael J. Wirthlin
Designing and Debugging Custom Computing Applications. IEEE Des. Test Comput. 17 (1) (2000)
Brad L. Hutchings, Brent E. Nelson
Using general-purpose programming languages for FPGA design. DAC (2000)
David Eppstein, Marshall W. Bern, Brad L. Hutchings
Algorithms for Coloring Quadtrees CoRR (1999)
Alan Marshall, Tony Stansfield, Igor Kostarnov, Jean Vuillemin, Brad L. Hutchings
A Reconfigurable Arithmetic Array for Multimedia Application. FPGA (1999)
Brad L. Hutchings, Peter Bellows, Joseph Hawkins, K. Scott Hemmert, Brent E. Nelson, Mike Rytting
A CAD Suite for High-Performance FPGA Design. FCCM (1999)
John D. Villasenor, Brad L. Hutchings
The flexibility of configurable computing. IEEE Signal Process. Mag. 15 (5) (1998)
Michael J. Wirthlin, Brad L. Hutchings
Improving functional density using run-time circuit reconfiguration [FPGAs]. IEEE Trans. Very Large Scale Integr. Syst. 6 (2) (1998)
Peter Bellows, Brad L. Hutchings
JHDL - An HDL for Reconfigurable Systems. FCCM (1998)
Michael Rencher, Brad L. Hutchings
Automated target recognition on SPLASH 2. FCCM (1997)
Michael J. Wirthlin, Brad L. Hutchings
Improving Functional Density Through Run-Time Constant Propagation. FPGA (1997)
Brad L. Hutchings
ASICs, Processors, and Configurable Computing. HICSS (1) (1997)
Brad L. Hutchings
Exploiting reconfigurability through domain-specific systems. FPL (1997)
David A. Clark, Brad L. Hutchings
Supporting FPGA microprocessors through retargetable software tools. FCCM (1996)
James G. Eldredge, Brad L. Hutchings
Run-Time Reconfiguration: A method for enhancing the functional density of SRAM-based FPGAs. J. VLSI Signal Process. 12 (1) (1996)
Pieter J. Bakkes, Jan J. Du Plessis, Brad L. Hutchings
Mixing fixed and reconfigurable logic for array processing. FCCM (1996)
Michael J. Wirthlin, Brad L. Hutchings
Sequencing Run-Time Reconfigured Hardware with Software. FPGA (1996)
Russell J. Petersen, Brad L. Hutchings
An Assessment of the Suitability of FPGA-Based Systems for Use in Digital Signal Processing. FPL (1995)
Michael J. Wirthlin, Brad L. Hutchings
A dynamic instruction set computer. FCCM (1995)
Brad L. Hutchings, Michael J. Wirthlin
Implementation Approaches for Reconfigurable Logic Applications. FPL (1995)
James D. Hadley, Brad L. Hutchings
Design methodologies for partially reconfigured systems. FCCM (1995)
Brad L. Hutchings, Tony M. Carter
High-Speed Circuit Design: CAD Tools and Computational Challenges. HICSS (1) (1994)
Brad L. Hutchings, A. R. Grahn, Russell J. Petersen
Multiple-Layer Cross-Field Ultrasonic Tactile Sensor. ICRA (1994)
Bir Bhanu, Brad L. Hutchings, Kent F. Smith
VLSI design and implementation of a real-time image segmentation processor. Mach. Vis. Appl. 3 (1) (1989)