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Using Novel Configuration Techniques for Accelerated FPGA Aging.
Tanner Gaskin
Hayden Cook
Wesley Stirk
Robert Lucas
Jeffrey Goeders
Brad L. Hutchings
Published in:
FPL (2020)
Keyphrases
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hardware implementation
field programmable gate array
low cost
high speed
real time image processing
hardware design
age estimation
age related
hardware architecture
software implementation
optimal configuration
verilog hdl
database
data mining
parallel architecture