Balaram Sinharoy

Publication Activity (10 Years)

Years Active: 1992-2021
Publications (10 Years): 1

Top Topics

Energy Efficiency

Battery Powered

Ibm Power Processor

Advanced Features

Top Venues

IBM J. Res. Dev.

Publications

Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose
Energy Efficiency Boost in the AI-Infused POWER10 Processor. ISCA (2021)
Balaram Sinharoy, Randal C. Swanberg, Naresh Nayar, Bruce G. Mealey, Jeffrey Stuecheli, Berni Schiefer, Jens Leenstra, J. Jann, P. Oehler, D. Levitan, S. Eisen, D. Sanner, Thomas Pflueger, Cédric Lichtenau, W. E. Hall, T. Block
Advanced features in IBM POWER8 systems. IBM J. Res. Dev. 59 (1) (2015)
Balaram Sinharoy, James Van Norstrand, Richard J. Eickemeyer, Hung Q. Le, Jens Leenstra, Dung Q. Nguyen, B. Konigsburg, K. Ward, M. D. Brown, José E. Moreira, D. Levitan, S. Tung, David Hrusecky, James W. Bishop, Michael Gschwind, Maarten Boersma, Michael Kroener, Markus Kaltenbach, Tejas Karkhanis, K. M. Fernsler
IBM POWER8 processor core microarchitecture. IBM J. Res. Dev. 59 (1) (2015)
Joshua Friedrich, Hung Q. Le, William J. Starke, Jeff Stuecheli, Balaram Sinharoy, Eric J. Fluhr, Daniel M. Dreps, Victor V. Zyuban, Gregory S. Still, Christopher J. Gonzalez, David Hogenmiller, Frank Malgioglio, Ryan Nett, Ruchir Puri, Phillip J. Restle, David Shan, Zeynep Toprak Deniz, Dieter F. Wendel, Matthew M. Ziegler, Dave W. Victor
processor: Designed for big data, analytics, and cloud environments. ICICDT (2014)
Dieter F. Wendel, Ronald N. Kalla, James D. Warnock, Robert Cargnoni, Sam G. Chu, Joachim G. Clabes, Daniel Dreps, David Hrusecky, Joshua Friedrich, Md. Saiful Islam, James A. Kahle, Jens Leenstra, Gaurav Mittal, Jose Paredes, Juergen Pille, Phillip J. Restle, Balaram Sinharoy, George Smith, William J. Starke, Scott A. Taylor, James Van Norstrand, Stephen Weitzel, Phillip G. Williams, Victor V. Zyuban
POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor. IEEE J. Solid State Circuits 46 (1) (2011)
Ronald N. Kalla, Balaram Sinharoy, William J. Starke, Michael S. Floyd
Power7: IBM's Next-Generation Server Processor. IEEE Micro 30 (2) (2010)
Dieter F. Wendel, Ronald N. Kalla, Robert Cargnoni, Joachim G. Clabes, Joshua Friedrich, Roland Frech, James A. Kahle, Balaram Sinharoy, William J. Starke, Scott A. Taylor, Steve Weitzel, Sam G. Chu, Md. Saiful Islam, Victor V. Zyuban
: A highly parallel and scalable multi-core high-end server processor. ISSCC (2010)
Balaram Sinharoy
POWER7 multi-core processor design. MICRO (2009)
Ronald N. Kalla, Balaram Sinharoy
POWER7: IBM's next generation server processor. Hot Chips Symposium (2009)
Balaram Sinharoy, Ronald N. Kalla, Joel M. Tendler, Richard J. Eickemeyer, Jody B. Joyner
POWER5 system microarchitecture. IBM J. Res. Dev. 49 (4-5) (2005)
Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. HPCA (2005)
Joachim G. Clabes, Joshua Friedrich, Mark Sweet, Jack DiLullo, Sam G. Chu, Donald W. Plass, James Dawson, Paul Muench, Larry Powell, Michael S. Floyd, Balaram Sinharoy, Mike Lee, Michael Goulet, James Wagoner, Nicole S. Schwartz, Stephen L. Runyon, Gary Gorman, Phillip J. Restle, Ronald N. Kalla, Joseph McGill, J. Steve Dodson
Design and implementation of the POWER5 microprocessor. DAC (2004)
Ronald N. Kalla, Balaram Sinharoy, Joel M. Tendler
IBM Power5 Chip: A Dual-Core Multithreaded Processor. IEEE Micro 24 (2) (2004)
Joel M. Tendler, J. Steve Dodson, J. S. Fields Jr., Hung Q. Le, Balaram Sinharoy
POWER4 system microarchitecture. IBM J. Res. Dev. 46 (1) (2002)
Wael El-Essawy, David H. Albonesi, Balaram Sinharoy
A microarchitectural-level step-power analysis tool. ISLPED (2002)
Balaram Sinharoy
Compiler optimization to improve data locality for processor multithreading. Sci. Program. 7 (1) (1999)
Balaram Sinharoy, Boleslaw K. Szymanski
Parallelising Compilers and Systems. Parallel Algorithms Appl. 12 (1-3) (1997)
Balaram Sinharoy
Optimized Thread Creation for Processor Multithreading. Comput. J. 40 (6) (1997)
Balaram Sinharoy, Boleslaw K. Szymanski
Introduction: Special Issue on Optimising Compilers for Parallel Languages. Parallel Algorithms Appl. 12 (1-3) (1997)
Balaram Sinharoy, Rama Govindaraju
Improving Software MP Efficiency for Shared Memory Systems. HICSS (1) (1996)
Balaram Sinharoy, Boleslaw K. Szymanski
Announcement of a Special Issue of the Journal of Parallel Algorithms and Applications on Optimising Compilers for Parallel Languages. Parallel Algorithms Appl. 7 (3-4) (1995)
Boleslaw K. Szymanski, William Maniatty, Balaram Sinharoy
Simultaneous Parallel Reduction on SIMD Machines. Parallel Process. Lett. 5 (1995)
Balaram Sinharoy
Compiling for Multithreaded Multicomputer. LCR (1995)
Can C. Özturan, Balaram Sinharoy, Boleslaw K. Szymanski
Compiler Technology for Parallel Scientific Computation. Sci. Program. 3 (3) (1994)
Balaram Sinharoy, Boleslaw K. Szymanski
Data and Task Alignment in Distributed Memory Architectures. J. Parallel Distributed Comput. 21 (1) (1994)
Balaram Sinharoy, Boleslaw K. Szymanski
Finding Optimum Wavefront of Parallel Computation. Parallel Algorithms Appl. 2 (1-2) (1994)
Boleslaw K. Szymanski, Balaram Sinharoy
Complexity of the Closest Vector Problem in a Lattice Generated by (0, 1)-Matrix. Inf. Process. Lett. 42 (3) (1992)
Boleslaw K. Szymanski, Balaram Sinharoy
Corrigenda: Complexity of the Closest Vector Problem in a Lattice Generated by (0, 1)-Matrix. Inf. Process. Lett. 43 (3) (1992)
William Maniatty, Boleslaw K. Szymanski, Balaram Sinharoy
Efficiency of Data Alignment on Maspar. SIGPLAN Workshop (1992)