Thomas Pflueger

Publication Activity (10 Years)

Years Active: 1997-2015
Publications (10 Years): 0

Top Topics

Design Methodology

Logic Synthesis

Knowledge Based Systems

Top Venues

IBM J. Res. Dev.

Publications

Balaram Sinharoy, Randal C. Swanberg, Naresh Nayar, Bruce G. Mealey, Jeffrey Stuecheli, Berni Schiefer, Jens Leenstra, J. Jann, P. Oehler, D. Levitan, S. Eisen, D. Sanner, Thomas Pflueger, Cédric Lichtenau, W. E. Hall, T. Block
Advanced features in IBM POWER8 systems. IBM J. Res. Dev. 59 (1) (2015)
Tobias Webel, Thomas Pflueger, Ralf Ludewig, Cédric Lichtenau, Walter Niklaus, Ralf Schaufler
Scalable and modular pervasive logic/firmware design. IBM J. Res. Dev. 56 (1) (2012)
Erwin B. Cohen, Norman J. Rohrer, Peter A. Sandon, Miles G. Canada, Cédric Lichtenau, Mathew I. Ringler, Paul Kartschoke, R. Floyd, Jan Heaslip, M. Ross, Thomas Pflueger, Rolf B. Hilgendorf, Pete McCormick, G. Salem, J. Connor, Stephen F. Geissler, Dana Thygesen
A 64B CPU Pair: Dual- and Single-Processor Chips. ISSCC (2006)
Jürgen Koehl, Ulrich Baur, Thomas Ludwig, Bernhard Kick, Thomas Pflueger
A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset. DATE (1998)
Gerhard Döttling, Klaus Joerg Getzlaff, Bernd Leppla, Walter Lipponer, Thomas Pflueger, Thomas Schlipf, Dietmar Schmunkamp, Udo Wille
S/390 Parallel Enterprise Server Generation 3: A balanced system and cache structure. IBM J. Res. Dev. 41 (4&5) (1997)
Bernhard Kick, Ulrich Baur, Jürgen Koehl, Thomas Ludwig, Thomas Pflueger
Standard-cell-based design methodology for high-performance support chips. IBM J. Res. Dev. 41 (4&5) (1997)