Ralf Ludewig

Publication Activity (10 Years)

Years Active: 2001-2012
Publications (10 Years): 0

Top Topics

Design Methodology

Logic Synthesis

Knowledge Based Systems

Top Venues

IBM J. Res. Dev.

Publications

Tobias Webel, Thomas Pflueger, Ralf Ludewig, Cédric Lichtenau, Walter Niklaus, Ralf Schaufler
Scalable and modular pervasive logic/firmware design. IBM J. Res. Dev. 56 (1) (2012)
Ralf Ludewig, Thomas Hollstein, Falko Schütz, Manfred Glesner
Rapid Prototyping of an Integrated Testing and Debugging Unit. IEEE International Workshop on Rapid System Prototyping (2004)
Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred Glesner, Kong-Pang Pun, Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong
IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. FPL (2004)
Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner
Hardware-Assisted Signal Activity Analysis for Power Estimation in Rapid Prototyped Systems. Des. Autom. Embed. Syst. 8 (4) (2003)
Chun Hok Ho, Kuen Hung Tsoi, H. C. Yeung, Yuet Ming Lam, Kin-Hong Lee, Philip Heng Wai Leong, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner
Arbitrary function approximation in HDLs with application to the N-body problem. FPT (2003)
Thomas Hollstein, Ralf Ludewig, Heiko Zimmer, Christoph Mager, Simon Hohenstern, Manfred Glesner
Hinoc: A Hierarchical Generic Approach for on-Chip Communication, Testing and Debugging of SoCs. VLSI-SoC (Selected Papers) (2003)
Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Juan Jesús Ocampo Hidalgo, Manfred Glesner
Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems. IEEE International Workshop on Rapid System Prototyping (2003)
Thomas Hollstein, Ralf Ludewig, Christoph Mager, Peter Zipf, Manfred Glesner
A hierarchical generic approach for on-chip communication, testing and debugging of SoCs. VLSI-SOC (2003)
Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek
Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL (2003)
Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner
Fly - A Modifiable Hardware Compiler. FPL (2002)
Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner
Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System. IEEE International Workshop on Rapid System Prototyping (2002)
Abdulfattah Mohammad Obeid, Alberto García Ortiz, Ralf Ludewig, Manfred Glesner
Prototyping of a High Performance Generic Viterbi Decoder. IEEE International Workshop on Rapid System Prototyping (2002)
Lukusa D. Kabulepa, Tideya Kella, Thilo Pionteck, Ralf Ludewig, Jürgen Becker, J. Plechinger, Manfred Glesner
On the numerical accuracy of CORDIC-based frequency offset compensation in burst oriented OFDM systems. ICECS (2001)