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A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset.

Jürgen KoehlUlrich BaurThomas LudwigBernhard KickThomas Pflueger
Published in: DATE (1998)
Keyphrases
  • single chip
  • high speed
  • design process
  • neural network
  • knowledge based systems
  • computer architecture
  • circuit design
  • chip design
  • data driven
  • embedded systems
  • low power
  • engineering design
  • gate array