A SAT Based Test Generation Method for Delay Fault Testing of Macro Based Circuits.
Santino MeleMichele FavalliPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2011)
Keyphrases
- generation method
- test cases
- software testing
- test data
- chip design
- power dissipation
- test suite
- test sequences
- fault diagnosis
- test generation
- testing process
- test data generation
- regression testing
- statistical tests
- fault models
- bounded model checking
- neural network
- usability testing
- answer set programming
- model based testing
- real time embedded systems
- code coverage
- integration testing
- analog vlsi
- fault model
- circuit design
- test set