Yusuke Ohtomo

Publication Activity (10 Years)

Years Active: 1994-2015
Publications (10 Years): 0

Top Topics

Delay Insensitive

Embedded Systems

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEICE Trans. Electron.

Publications

Nobutaro Shibata, Yusuke Ohtomo, Mika Nishisaka, Yasuhiro Sato
CMOS/SIMOX Techniques. IEEE Trans. Very Large Scale Integr. Syst. 23 (6) (2015)
Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
A 25-Gb/s LD driver with area-effective inductor in a 0.18-µm CMOS. ASP-DAC (2013)
Atsushi Kanda, Akira Ohki, Takeshi Kurosaki, Hiroaki Sanjoh, Kota Asaka, Ryoko Yoshimura, Toshio Ito, Makoto Nakamura, Masafumi Nogawa, Yusuke Ohtomo, Mikio Yoneyama
Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems. IEICE Trans. Electron. (7) (2013)
Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Makoto Nakamura, Hiroshi Koizumi, Mitsuo Nakamura
Analysis and design based on small-signal equivalent circuit for a lO-GHz ring VCO with 65-nm CMOS. MWSCAS (2013)
Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
A 16Gb/s area-efficient LD driver with interwoven inductor in a 0.18µm CMOS. ASP-DAC (2012)
Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
Area-Effective Inductive Peaking with Interwoven Inductor for High-Speed Laser-Diode Driver for Optical Communication System. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2012)
Hiroshi Koizumi, Minoru Togashi, Masafumi Nogawa, Yusuke Ohtomo
A 10Gb/s burst-mode laser diode driver for burst-by-burst power saving. ISSCC (2012)
Keiji Kishine, Hiromi Inaba, Yusuke Ohtomo, Makoto Nakamura, Mitsuo Nakamura
Design method for an over-IO-Gb/s CMOS CML buffer circuit for delay control. MWSCAS (2012)
Akira Tsuchiya, Takeshi Kuboki, Yusuke Ohtomo, Keiji Kishine, Shigekazu Miyawaki, Makoto Nakamura, Hidetoshi Onodera
Bandwidth enhancement for high speed amplifier utilizing mutually coupled on-chip inductors. ISOCC (2011)
Hiroaki Katsurai, Hideki Kamitsuna, Hiroshi Koizumi, Jun Terada, Yusuke Ohtomo, Tsugumichi Shibata
An Injection-Controlled 10-Gb/s Burst-Mode CDR Circuit for a 1G/10G PON System. IEICE Trans. Electron. (4) (2011)
Takeshi Kuboki, Yusuke Ohtomo, Akira Tsuchiya, Keiji Kishine, Hidetoshi Onodera
A 16Gbps laser-diode driver with interwoven peaking inductors in 0.18-µm CMOS. CICC (2010)
Jun Terada, Yusuke Ohtomo, Kazuyoshi Nishimura, Hiroaki Katsurai, Shunji Kimura, Naoto Yoshimoto
Jitter-reduction and pulse-width-distortion compensation circuits for a 10Gb/s burst-mode CDR circuit. ISSCC (2009)
Yusuke Ohtomo, Masafumi Nogawa, Kazuyoshi Nishimura, Shunji Kimura, Tomoaki Yoshida, Tomoaki Kawamura, Minoru Togashi, Kiyomi Kumozaki
A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs. IEICE Trans. Electron. (6) (2008)
Tomoaki Kawamura, Yusuke Ohtomo, Kazuyoshi Nishimura, Noboru Ishihara
A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion. ISSCC (2008)
Jun Terada, Kazuyoshi Nishimura, Shunji Kimura, Hiroaki Katsurai, Naoto Yoshimoto, Yusuke Ohtomo
A 10.3125Gb/s Burst-Mode CDR Circuit using a δσ DAC. ISSCC (2008)
Yusuke Ohtomo, Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa
A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI. IEICE Trans. Electron. (4) (2008)
Jun Terada, Kazuyoshi Nishimura, Shunji Kimura, Hiroaki Katsurai, Naoto Yoshimoto, Yusuke Ohtomo
A 10.3 Gb/s Burst-Mode CDR Using a ΔΣ DAC. IEEE J. Solid State Circuits 43 (12) (2008)
Yoshihito Sakai, Hideaki Kimura, Yusuke Ohtomo, Makoto Tsubokawa
A wide range, over 9.6ns, skew compensation LSI for a flexible optical access system. IEICE Electron. Express 5 (4) (2008)
Larry DeVito, Yusuke Ohtomo
SE3 Last Mile Access Options: PON/DSL/Cable/Wireless. ISSCC (2007)
Takashi Nakanishi, Ken-Ichi Suzuki, Youichi Fukada, Naoto Yoshimoto, Makoto Nakamura, Kazutoshi Kato, Kazuyoshi Nishimura, Yusuke Ohtomo, Makoto Tsubokawa
High sensitivity APD burst-mode receiver for 10Gbit/s TDM-PON system. IEICE Electron. Express 4 (19) (2007)
Masafumi Nogawa, Yusuke Ohtomo, Shunji Kimura, Kazuyoshi Nishimura, Tomoaki Kawamura, Minoru Togashi
A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS. ISSCC (2006)
Yusuke Ohtomo, Kazuyoshi Nishimura, Masafumi Nogawa
A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS. IEEE J. Solid State Circuits 41 (9) (2006)
Eiji Oki, Naoaki Yamanaka, Yusuke Ohtomo, Kazuhiko Okazaki, Ryusuke Kawano
A 10-Gb/s (1.25 Gb/s×8)4×2 0.25-μm CMOS/SIMOX ATM switch based on scalable distributed arbitration. IEEE J. Solid State Circuits 34 (12) (1999)
Masafumi Nogawa, Yusuke Ohtomo
A data-transition look-ahead DFF circuit for statistical reduction in power consumption. IEEE J. Solid State Circuits 33 (5) (1998)
Yusuke Ohtomo, Sadayuki Yasuda, Minoru Togashi, Massyuki Ino, Yasuyuki Tanabe, Jun-ichi Inoue, Masafumi Nogawa, Sshigeki Hino
BiCMOS circuit technology for a 704 MHz ATM switch LSI. IEEE J. Solid State Circuits 29 (5) (1994)