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A 12.5-Gb/s Parallel Phase Detection Clock and Data Recovery Circuit in 0.13-$muhbox m$CMOS.
Yusuke Ohtomo
Kazuyoshi Nishimura
Masafumi Nogawa
Published in:
IEEE J. Solid State Circuits (2006)
Keyphrases
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high speed
data sets
data analysis
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database
data structure
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training data
object detection
data mining techniques
image data
probability distribution
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