Wuudiann Ke

Publication Activity (10 Years)

Years Active: 1988-1996
Publications (10 Years): 0

Publications

Wuudiann Ke
Hybrid Pin Control Using Boundary-Scan And Its Applications. Asian Test Symposium (1996)
Wuudiann Ke
Backplane Interconnect Test in a Boundary-Scan Environment. ITC (1996)
Wuudiann Ke, Premachandran R. Menon
Multifault testability of delay-testable circuits. VTS (1995)
Wuudiann Ke, Premachandran R. Menon
Synthesis of Delay-Verifiable Combinational Circuits. IEEE Trans. Computers 44 (2) (1995)
Wuudiann Ke, Premachandran R. Menon
Multifault and delay-fault testability of multilevel circuits. J. Electron. Test. 6 (3) (1995)
Wuudiann Ke, Premachandran R. Menon
Path-delay-fault testable nonscan sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (5) (1995)
Wuudiann Ke, Premachandran R. Menon
Delay-testable implementations of symmetric functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (6) (1995)
Wuudiann Ke, Duy Le, Najmi T. Jarwala
A Secure Data Transmission Scheme for 1149.1 Backplane Test Bus. ITC (1995)
Wuudiann Ke, Premachandran R. Menon
Delay-Verifiability of Combinational Circuits Based on Primitive Faults. ICCD (1994)
Wuudiann Ke, Premachandran R. Menon
Synthesis of Delay-Verifiable Two-Level Circuits. EDAC-ETC-EUROASIC (1994)
Wuudiann Ke, Premachandran R. Menon
Realization of fully path-delay-fault testable non-scan sequential circuits. VTS (1994)
Wuudiann Ke, Sharad C. Seth, Bhargab B. Bhattacharya
A fast fault simulation algorithm for combinational circuits. ICCAD (1988)