Delay-Verifiability of Combinational Circuits Based on Primitive Faults.
Wuudiann KePremachandran R. MenonPublished in: ICCD (1994)
Keyphrases
- logic circuits
- power dissipation
- asynchronous circuits
- built in self test
- fault models
- fault diagnosis
- fault detection
- low power
- delay insensitive
- power consumption
- multiple faults
- high level
- fault model
- critical path
- analog circuits
- high speed
- root cause
- logic synthesis
- analog vlsi
- loss probability
- model based diagnosis
- chip design
- tunnel diode
- security properties
- circuit design
- closed loop