Realization of fully path-delay-fault testable non-scan sequential circuits.

Wuudiann Ke Premachandran R. Menon

Published in: VTS (1994)

Keyphrases

fault models
power dissipation
fault detection
fault diagnosis
shortest path
high speed
delay insensitive
path length
endpoints
asynchronous circuits
fault model
neural network
multicast tree
analog circuits
path selection
analog vlsi
multiple faults