Steffen Tarnick

Publication Activity (10 Years)

Years Active: 1992-2011
Publications (10 Years): 0

University of Potsdam, Germany (PHD)

Education History

University of Potsdam, Germany

PHD

Publications

Dimitris Magos, Ioannis Voyiatzis, Steffen Tarnick
An Accumulator - Based Test-Per-Clock Scheme. IEEE Trans. Very Large Scale Integr. Syst. 19 (6) (2011)
Steffen Tarnick
Design of embedded constant weight code checkers based on averaging operations. IOLTS (2010)
Dimitris Magos, Ioannis Voyiatzis, Steffen Tarnick
A Low-Cost Accumulator-Based Test Pattern Generation Architecture. IOLTS (2008)
Steffen Tarnick
- 1. J. Electron. Test. 24 (6) (2008)
Steffen Tarnick
Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters. IOLTS (2007)
Steffen Tarnick
Embedded Borden 2-UED Code Checkers. IOLTS (2006)
Steffen Tarnick
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes. J. Electron. Test. 21 (4) (2005)
Steffen Tarnick
-UED and BUED Codes. J. Electron. Test. 20 (5) (2004)
Steffen Tarnick
Single-Output Embedded Checkers for Systematic Unordered Codes. IOLTS (2004)
Steffen Tarnick
A Design Method for Embedded Self-Testing t-UED and BUED Code Checkers. IOLTS (2003)
Steffen Tarnick
Self-Testing Embedded Checkers for Bose-Lin, Bose, and a Class of Borden Codes. DATE (2003)
Albrecht P. Stroele, Steffen Tarnick
Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes. J. Electron. Test. 16 (4) (2000)
Albrecht P. Stroele, Steffen Tarnick
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Code. VTS (1999)
Steffen Tarnick
Embedded Parity and Two-Rail TSC Checkers with Error-Memorizing Capability. VLSI Design 1998 (4) (1998)
Steffen Tarnick, Albrecht P. Stroele
Embedded self-testing checkers for low-cost arithmetic codes. ITC (1998)
Sandip Kundu, Egor S. Sogomonyan, Michael Gössel, Steffen Tarnick
Self-Checking Comparator with One Periodic Output. IEEE Trans. Computers 45 (3) (1996)
Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois
Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Trans. Computers 44 (2) (1995)
Steffen Tarnick
Controllable self-checking checkers for conditional concurrent checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (5) (1995)
Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich
Pattern generation for a deterministic BIST scheme. ICCAD (1995)
Steffen Tarnick
Controllable self-checking checkers for conditional concurrent checking. VTS (1994)
Sybille Hellebrand, Steffen Tarnick, Bernard Courtois, Janusz Rajski
Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers. ITC (1992)

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Publication Activity (10 Years)

Steffen Tarnick