Sanjay V. Rajopadhye

ORCID

Publication Activity (10 Years)

Years Active: 1985-2024
Publications (10 Years): 24

Top Venues

CoRR

IPDPS Workshops

IEEE Trans. Parallel Distributed Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Chiranjeb Mondal, Sanjay V. Rajopadhye
Taking RNA-RNA Interaction to Machine Peak. IEEE Trans. Parallel Distributed Syst. 35 (6) (2024)
Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay V. Rajopadhye
An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators. CoRR (2024)
Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye
Maximal Simplification of Polyhedral Reductions. CoRR (2023)
Manish Bhattarai, Namita Kharat, Ismael Boureima, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov
Distributed non-negative RESCAL with automatic model selection for exascale data. J. Parallel Distributed Comput. 179 (2023)
Louis Narmour, Steven Derrien, Sanjay V. Rajopadhye
Automatic Algorithm-Based Fault Tolerance (AABFT) of Stencil Computations. PACT (2023)
Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye
Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (5) (2023)
Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye
An Irredundant Decomposition of Data Flow with Affine Dependences. CoRR (2023)
Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye
Increasing FPGA Accelerators Memory Bandwidth with a Burst-Friendly Memory Layout. CoRR (2022)
Manish Bhattarai, Namita Kharat, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov
Distributed non-negative RESCAL with Automatic Model Selection for Exascale Data. CoRR (2022)
Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye
Maximal Atomic irRedundant Sets: a Usage-based Dataflow Partitioning Algorithm. CoRR (2022)
Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye
(When) Do Multiple Passes Save Energy? SAMOS (2021)
Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye
Monoparametric Tiling of Polyhedral Programs. Int. J. Parallel Program. 49 (3) (2021)
Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov
Optimization Approach to Accelerator Codesign. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Sanjay V. Rajopadhye
On Simplifying Dependent Polyhedral Reductions. CoRR (2020)
Brandon Gildemaster, Prerana Ghalsasi, Sanjay V. Rajopadhye
A Tropical Semiring Multiple Matrix-Product Library on GPUs: (not just) a step towards RNA-RNA Interaction Computations. IPDPS Workshops (2020)
Tarequl Islam Sifat, Nirmal Prajapati, Sanjay V. Rajopadhye
Revisiting Sparse Dynamic Programming for the 0/1 Knapsack Problem. ICPP (2020)
Utpal Bora, Santanu Das, Pankaj Kureja, Saurabh Joshi, Ramakrishna Upadrasta, Sanjay V. Rajopadhye
LLOV: A Fast Static Data-Race Checker for OpenMP Programs. CoRR (2019)
Yun Zou, Sanjay V. Rajopadhye
A Code Generator for Energy-Efficient Wavefront Parallelization of Uniform Dependence Computations. IEEE Trans. Parallel Distributed Syst. 29 (9) (2018)
Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev
Analytical Cost Metrics : Days of Future Past. CoRR (2018)
Waruna Ranasinghe, Nirmal Prajapati, Tomofumi Yuki, Sanjay V. Rajopadhye
PCOT: Cache Oblivious Tiling of Polyhedral Programs. CoRR (2018)
Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov
Accelerator Codesign as Non-Linear Optimization. CoRR (2017)
Nirmal Prajapati, Waruna Ranasinghe, Sanjay V. Rajopadhye, Rumen Andonov, Hristo N. Djidjev, Tobias Grosser
Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils. PPOPP (2017)
Gaël Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien
One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs. FPL (2017)
Tian Jin, Nirmal Prajapati, Waruna Ranasinghe, Guillaume Iooss, Yun Zou, Sanjay V. Rajopadhye, David G. Wonnacott
Hybrid Static/Dynamic Schedules for Tiled Polyhedral Programs. CoRR (2016)
Yun Zou, Sanjay V. Rajopadhye
Automatic Energy Efficient Parallelization of Uniform Dependence Computations. ICS (2015)
Nirmal Prajapati, Waruna Ranasinghe, Vamshi Tandrapati, Rumen Andonov, Hristo N. Djidjev, Sanjay V. Rajopadhye
Energy Modeling and Optimization for Tiled Nested-Loop Codes. IPDPS Workshops (2015)
Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton, Alexandre Cornu, Dominique Lavenier
Combining execution pipelines to improve parallel implementation of HMMER on FPGA. Microprocess. Microsystems 39 (7) (2015)
Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye
On Program Equivalence with Reductions. SAS (2014)
Lucas W. Krakow, Louis Rabiet, Yun Zou, Guillaume Iooss, Edwin K. P. Chong, Sanjay V. Rajopadhye
Optimizing Dynamic Resource Allocation. ICCS (2014)
Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat
Array dataflow analysis for polyhedral X10 programs. PPOPP (2013)
Tomofumi Yuki, Sanjay V. Rajopadhye
Folklore Confirmed: Compiling for Speed = Compiling for Energy. LCPC (2013)
Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat
Checking Race Freedom of Clocked X10 Programs. CoRR (2013)
Jean-Marc Jézéquel, Benoît Combemale, Steven Derrien, Clement Guy, Sanjay V. Rajopadhye
Bridging the chasm between MDE and the world of compilation. Softw. Syst. Model. 11 (4) (2012)
Lakshminarayanan Renganarayanan, DaeGon Kim, Michelle Mills Strout, Sanjay V. Rajopadhye
Parameterized loop tiling. ACM Trans. Program. Lang. Syst. 34 (1) (2012)
Hilary E. Brown, Siddharth Suryanarayanan, Sudarshan Natarajan, Sanjay V. Rajopadhye
Improving Reliability of Islanded Distribution Systems With Distributed Renewable Energy Resources. IEEE Trans. Smart Grid 3 (4) (2012)
Yun Zou, Sanjay V. Rajopadhye
Scan detection and parallelization in "inherently sequential" nested loop programs. CGO (2012)
Tomofumi Yuki, Gautam Gupta, DaeGon Kim, Tanveer Pathan, Sanjay V. Rajopadhye
AlphaZ: A System for Design Space Exploration in the Polyhedral Model. LCPC (2012)
Sanjay V. Rajopadhye, Samik Gupta, DaeGon Kim
Alphabets: An Extended Polyhedral Equational Language. IPDPS Workshops (2011)
Antoine Floch, Tomofumi Yuki, Clement Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France
Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far? MoDELS (2011)
V. Basupalli, Tomofumi Yuki, Sanjay V. Rajopadhye, Antoine Morvan, Steven Derrien, Patrice Quinton, David Wonnacott
ompVerify: Polyhedral Analysis for the OpenMP Programmer. IWOMP (2011)
Doug Hains, Zach Cashero, Mark Ottenberg, Wim Bohm, Sanjay V. Rajopadhye
Improving CUDASW++, a Parallelization of Smith-Waterman for CUDA Enabled Devices. IPDPS Workshops (2011)
Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton
Accelerating HMMER on FPGA using parallel prefixes and reductions. FPT (2010)
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye, Charles Anderson, Alexandre E. Eichenberger, Kevin O'Brien
Automatic creation of tile size selection models. CGO (2010)
DaeGon Kim, Sanjay V. Rajopadhye
Efficient Tiled Loop Generation: D-Tiling. LCPC (2009)
Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset, Maurice Tchuente
A reindexing based approach towards mapping of DAG with affine schedules onto parallel embedded systems. J. Parallel Distributed Comput. 69 (1) (2009)
Nissa Osheim, Michelle Mills Strout, Dave Rostron, Sanjay V. Rajopadhye
Smashing: Folding Space to Tile through Time. LCPC (2008)
Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan
A domain specific interconnect for reconfigurable computing. LCTES (2008)
Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
Positivity, posynomials and tile size selection. SC (2008)
Gautam Gupta, Sanjay V. Rajopadhye
The Z-polyhedral model. PPOPP (2007)
Gautam Gupta, DaeGon Kim, Sanjay V. Rajopadhye
Scheduling in the Z-Polyhedral Model. IPDPS (2007)
K. Nibbelink, Sanjay V. Rajopadhye, Richard McConnell
0/1 Knapsack on Hardware: A Complete Solution. ASAP (2007)
Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay V. Rajopadhye, Michelle Mills Strout
Parameterized tiled loops for free. PLDI (2007)
DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay V. Rajopadhye, Michelle Mills Strout
Multi-level tiling: M for the price of one. SC (2007)
Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll
Special Issue on ASAP 2004 Conference. J. VLSI Signal Process. 49 (1) (2007)
Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, Sanjay V. Rajopadhye
Towards Optimal Multi-level Tiling for Stencil Computations. IPDPS (2007)
DaeGon Kim, Gautam Gupta, Sanjay V. Rajopadhye
On Control Signals for Multi-Dimensional Time. LCPC (2006)
DaeGon Kim, Sanjay V. Rajopadhye
An Improved Systolic Architecture for LU Decomposition. ASAP (2006)
Gautam Gupta, Sanjay V. Rajopadhye
Simplifying reductions. POPL (2006)
Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye
Combined ILP and Register Tiling: Analytical Model and Optimization Framework. LCPC (2005)
Sanjay V. Rajopadhye, Kolin Paul
A 1.5-D Architecture for Back-Propagation Training. ERSA (2005)
Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
A Geometric Programming Framework for Optimal Multi-Level Tiling. SC (2004)
Rumen Andonov, Stephan Balev, Sanjay V. Rajopadhye, Nicola Yanev
Optimal Semi-Oblique Tiling. IEEE Trans. Parallel Distributed Syst. 14 (9) (2003)
Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
Switched Memory Architectures-Moving Beyond Systolic Arrays. ASAP (2003)
Gautam Gupta, Sanjay V. Rajopadhye, Patrice Quinton
Scheduling reductions on realistic machines. SPAA (2002)
Sanjay V. Rajopadhye, Steven Derrien
Energy/Power Estimation of Regular Processor Arrays. ISSS (2002)
Rumen Andonov, Stephan Balev, Sanjay V. Rajopadhye, Nicola Yanev
Optimal semi-oblique tiling. SPAA (2001)
Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
Combining Instruction and Loop Level Parallelism for FPGAs. FCCM (2001)
Steven Derrien, Sanjay V. Rajopadhye
Loop Tiling for Reconfigurable Accelerators. FPL (2001)
Manju Manjunathaiah, Graham M. Megson, Sanjay V. Rajopadhye, Tanguy Risset
Uniformization of Affine Dependance Programs for Parallel Embedded System Design. ICPP (2001)
Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
Combined instruction and loop parallelism in array synthesis for FPGAs. ISSS (2001)
David Cachera, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms. IPDPS (2001)
Scott Bowden, Doran Wilde, Sanjay V. Rajopadhye
Quadratic Control Signals in Linear Systolic Arrays. ASAP (2000)
Fabien Quilleré, Sanjay V. Rajopadhye, Doran Wilde
Generation of Efficient Nested Loops from Polyhedra. Int. J. Parallel Program. 28 (5) (2000)
Rumen Andonov, Vincent Poirriez, Sanjay V. Rajopadhye
Unbounded knapsack problem: Dynamic programming revisited. Eur. J. Oper. Res. 123 (2) (2000)
Steven Derrien, Sanjay V. Rajopadhye
FCCMS and the Memory Wall. FCCM (2000)
Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
Optimal Partitioning for FPGA Based Regular Array Implementations. PARELEC (2000)
Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Derivation of systolic algorithms for the algebraic path problem by recurrence transformations. Parallel Comput. 26 (11) (2000)
Fabien Quilleré, Sanjay V. Rajopadhye
Optimizing memory usage in the polyhedral model. ACM Trans. Program. Lang. Syst. 22 (5) (2000)
Sanjay V. Rajopadhye, Claude Tadonki, Tanguy Risset
The Algebraic Path Problem Revisited. Euro-Par (1999)
Stephan Balev, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - A Comparative Study. SPAA (1998)
Rumen Andonov, Sanjay V. Rajopadhye, Nicola Yanev
Optimal Orthogonal Tiling. Euro-Par (1998)
Rumen Andonov, Sanjay V. Rajopadhye
Optimal Orthogonal Tiling of 2-D Iterations. J. Parallel Distributed Comput. 45 (2) (1997)
Doran Wilde, Sanjay V. Rajopadhye
Memory Reuse Analysis in the Polyhedral Model. Parallel Process. Lett. 7 (2) (1997)
Rumen Andonov, Sanjay V. Rajopadhye
Knapsack on VLSI: from Algorithm to Optimal Circuit. IEEE Trans. Parallel Distributed Syst. 8 (6) (1997)
Patrick M. Lenders, Sanjay V. Rajopadhye
Multirate VLSI Arrays and Their Synthesis. IEEE Trans. Computers 46 (5) (1997)
Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
-Polyhedra Using a Canonical Representation. Parallel Process. Lett. 7 (2) (1997)
Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
Extension Of The Alpha Language To Recurrences On Sparse Periodic Domains. ASAP (1996)
Doran Wilde, Sanjay V. Rajopadhye
Memory Reuse Analysis in the Polyhedral Model. Euro-Par, Vol. I (1996)
Virginia Mary Lo, Sanjay V. Rajopadhye, Jan Arne Telle, Xiaoxiong Zhong
Parallel Divide and Conquer on Meshes. IEEE Trans. Parallel Distributed Syst. 7 (10) (1996)
Florent de Dinechin, Doran Wilde, Sanjay V. Rajopadhye, Rumen Andonov
A Regular VLSI Array for an Irregular Algorithm. IRREGULAR (1996)
Rumen Andonov, Hafid Bourzoufi, Sanjay V. Rajopadhye
Two-dimensional orthogonal tiling: from theory to practice. HiPC (1996)
Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
Deriving Imperative Code from Functional Programs. FPCA (1995)
Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
On deriving data parallel code from a functional program. IPPS (1995)
Patrick M. Lenders, Sanjay V. Rajopadhye
Synthesis of Multirate VLSI Arrays. ASAP (1995)
Doran Wilde, Sanjay V. Rajopadhye
The naive execution of affine recurrence equations. ASAP (1995)
Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem. Parallel Process. Lett. 5 (1995)
Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
Pure Systolic Array for a Class of Dynamic Dependency Recurrences. Parcella (1994)
Rumen Andonov, Sanjay V. Rajopadhye
A sparse knapsack algo-tech-cuit and its synthesis. ASAP (1994)
Rumen Andonov, Sanjay V. Rajopadhye
Optimal Tile Sizing. CONPAR (1994)
Sanjay V. Rajopadhye
An improved systolic algorithm for the algebraic path problem. Integr. 14 (3) (1993)

Sanjay V. Rajopadhye.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Sanjay V. Rajopadhye