Login / Signup
Combining execution pipelines to improve parallel implementation of HMMER on FPGA.
Naeem Abbas
Steven Derrien
Sanjay V. Rajopadhye
Patrice Quinton
Alexandre Cornu
Dominique Lavenier
Published in:
Microprocess. Microsystems (2015)
Keyphrases
</>
parallel implementation
high speed
data sets
signal processing
distributed memory
parallel architecture
real time
image processing
low cost
parallel computation
parallel computers
parallel implementations
general purpose
data acquisition
hardware implementation