Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout.
Corentin FerryTomofumi YukiSteven DerrienSanjay V. RajopadhyePublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2023)
Keyphrases
- memory bandwidth
- level parallelism
- parallel programming
- field programmable gate array
- processing power
- parallel computing
- floating point
- memory access
- high speed
- processing units
- hardware and software
- parallel algorithm
- low cost
- single instruction multiple data
- commodity hardware
- computing systems
- real time
- programming environment
- hardware implementation
- parallel processing
- signal processing
- processing elements
- cache misses
- massively parallel
- multi core processors
- computing power
- computational power
- memory requirements
- general purpose