Paula López

Publication Activity (10 Years)

Years Active: 1999-2022
Publications (10 Years): 35

Top Topics

Background Subtraction

Tracking Of Multiple Objects

Top Venues

Int. J. Circuit Theory Appl.

Publications

Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello
An 11 mA Capacitor-Less LDO With 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Marko Jaklin, Daniel García-Lesta, Víctor M. Brea, Paula López
Low-Power Techniques on a CMOS Vision Sensor Chip for Event Generation by Frame Differencing with High Dynamic Range. ICECS 2022 (2022)
Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde
Fast Time-Domain Super-Resolution for Single-Shot Multi- Path ToF Imaging. ICECS 2022 (2022)
Zhouyan Qiu, Joaquín Martínez-Sánchez, Víctor M. Brea, Paula López, Pedro Arias
Low-cost mobile mapping system solution for traffic sign segmentation using Azure Kinect. Int. J. Appl. Earth Obs. Geoinformation 112 (2022)
Peyman F. Shahandashti, Paula López, Víctor M. Brea, Daniel García-Lesta, Miguel Heredia Conde
A 2-Tap Macro-Pixel-Based Indirect ToF CMOS Image Sensor for Multi-Frequency Demodulation. ISCAS (2022)
Óscar Pereira-Rial, Paula López, Juan M. Carrillo
CMOS Capacitor-Less LDO for Low-Voltage Micro-Energy-Harvested Supplies. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (2) (2022)
Óscar Pereira-Rial, Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello
Design of a 5-bit Signed SRAM-based In-Memory Computing Cell for Deep Learning Models. ISCAS (2022)
Daniel García-Lesta, Óscar Pereira-Rial, Víctor M. Brea, Paula López, Diego Cabello
A General-Purpose CMOS Vision Sensor with In-Pixel 5-bit Convolutional Layer Computation. ICECS 2022 (2022)
Daniel García-Lesta, F. Pardo, Óscar Pereira-Rial, Víctor M. Brea, Paula López
HDC8192: A General Purpose Mixed-Signal CMOS Architecture for Massively Parallel Hyperdimensional Computing. ISCAS (2022)
Marko Jaklin, Daniel García-Lesta, Víctor M. Brea, Paula López
HDR 4T-APS Pixel for Event Generation by Frame Differencing. MWSCAS (2021)
Ginés Doménech-Asensi, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Víctor Manuel Brea Sánchez, Paula López
All-hardware SIFT implementation for real-time VGA images feature extraction. J. Real Time Image Process. 17 (2) (2020)
Óscar Pereira-Rial, Paula López, Raquel Pérez-Aloe, Juan M. Carrillo, Juan Francisco Duque-Carrillo
Compact CMOS Class-AB Output Stage With Robust Behavior Against PVT Variations. ICECS (2020)
Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello
1.88 nA Quiescent Current Capacitor-Less LDO with Adaptive Biasing Based on a SSF Absolute Voltage Difference Meter. ISCAS (2020)
Diego Cabello, Esteban Ferro, Óscar Pereira-Rial, Beatriz Martínez-Vázquez, Víctor M. Brea, Juan M. Carrillo, Paula López
On-Chip Solar Energy Harvester and PMU With Cold Start-Up and Regulated Output Voltage for Biomedical Applications. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (4) (2020)
Tobi Delbrück, Ibrahim Abe M. Elfadel, Shahzad Muzaffar, Germain Haessig, Bo Wang, Amine Bermak, Rui Graca, Luis A. Camuñas-Mesa, Bathiya Senevirathna, Pamela Abshire, Bernabé Linares-Barranco, Saeed Afshar, Shih-Chii Liu, Runchun Mark Wang, Piotr Dudek, Stephen J. Carey, José M. de la Rosa, Marc Dandin, Sheung Lu, Vincent Frick, Teresa Serrano-Gotarredona, Paula López, Melika Payvand, Advait Madhavan, Eric R. Fossum, Juan Camilo Vasquez Tieck, Ian Williams, Yan Liu, Timothy G. Constandinou, Alexander Serb, Ricardo Carmona-Galán, Robert Nawrocki, Walter D. Leon-Salas
Lessons Learned the Hard Way. ISCAS (2020)
Daniel García-Lesta, Paula López, Víctor M. Brea, Diego Cabello
A CMOS Vision Sensor for Background Subtraction. ISCAS (2020)
Óscar Pereira-Rial, Paula López, Juan M. Carrillo, Víctor M. Brea, Diego Cabello
Ultralow power voltage reference circuit for implantable devices in standard CMOS technology. Int. J. Circuit Theory Appl. 47 (7) (2019)
Óscar Pereira-Rial, Juan M. Carrillo, Paula López, Víctor M. Brea, Diego Cabello
Subthreshold Voltage Reference for Implantable Devices. ICECS (2019)
Esteban Ferro, Paula López, Víctor M. Brea, Diego Cabello
On-Chip Solar Cell and PMU on the Same Substrate with Cold Start-Up from nW and 80 dB of Input Power Range for Biomedical Applications. ISCAS (2019)
Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López
Live Demonstration: Deep Learning-Based Visual Tracking of Multiple Objects on a Low-Power Embedded System. ISCAS (2019)
Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications. IEEE Internet Things J. 6 (3) (2019)
J. Illade-Quinteiro, Paula López, Víctor M. Brea, Diego Cabello
Time-of-Flight Pixel with Homodyne Phase Demodulation in Standard CMOS Technology. ISCAS (2019)
Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor M. Brea, Paula López
Deep Learning-Based Multiple Object Visual Tracking on Embedded System for IoT and Mobile Edge Computing Applications. CoRR (2018)
Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello
Shannon Entropy as Background Dynamics Estimator In Foreground Detector Algorithms. ISCAS (2018)
Julio Illade-Quinteiro, Paula López, Víctor M. Brea, Diego Cabello
Pulsed time-of-flight pixel with on-chip 20 klux background light suppression in standard CMOS technology. Int. J. Circuit Theory Appl. 46 (5) (2018)
Beatriz Blanco-Filgueira, Daniel García-Lesta, Mauro Fernández-Sanjurjo, Víctor Manuel Brea Sánchez, Paula López
Live Demonstration: Deep Learning-Based Multiple Object Detection and Tracking on a Low-Power Embedded System. ICDSC (2018)
Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello
Impact of Analog Memories Non-Idealities on the Performance of Foreground Detection Algorithms. ISCAS (2018)
Tapani Nevalainen, Esteban Ferro, Víctor M. Brea, Paula López, Ari Paasio
Low-Power Regulator for Micro Energy Harvesting Applications. NORCAS (2018)
Daniel García-Lesta, Paula López, Víctor Manuel Brea Sánchez, Diego Cabello
In-pixel analog memories for a pixel-based background subtraction algorithm on CMOS vision sensors. Int. J. Circuit Theory Appl. 46 (9) (2018)
Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello
Live Demonstration: Light Energy Harvesting System with an On-Chip Solar Cell and Cold Start-Up. ISCAS (2018)
Daniel García-Lesta, Víctor M. Brea, Paula López, Diego Cabello
Effect of temporal and spatial noise on the performance of hardware oriented background extraction algorithms. NEWCAS (2017)
Daniel García-Lesta, Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello, J. Iglesias, J. Castillejo
Live demonstration: Wireless sensor network for snail pest detection. ISCAS (2016)
Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello
Dynamic model of on-chip inverting capacitive charge pumps with charge reusing. ISCAS (2016)
J. Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello
Time-of-flight chip in standard CMOS technology with in-pixel adaptive number of accumulations. ISCAS (2016)
Esteban Ferro, Paula López, Víctor M. Brea, Diego Cabello
Dynamic joint model of capacitive charge pumps and on-chip photovoltaic cells for CMOS micro-energy harvesting. Int. J. Circuit Theory Appl. 44 (10) (2016)
Daniel García-Lesta, Esteban Ferro, Víctor M. Brea, Paula López, Diego Cabello, J. Iglesias, J. Castillejo
Capacitance-based wireless sensor mote for snail pest detection. SAS (2015)
J. Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello
Dark current optimization of 4-transistor pixel topologies in standard CMOS technologies for time-of-flight sensors. ISCAS (2015)
Pablo Leyva, Ginés Doménech-Asensi, F. Javier Garrigós, Julio Illade-Quinteiro, Víctor M. Brea, Paula López, Diego Cabello
Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm. FPL (2014)
Víctor M. Brea, Manuel Suarez, J. Illade-Quinteiro, Paula López, Diego Cabello, Ginés Doménech-Asensi
Voltage boosters for on-chip solar cells on focal-plane processors. ICECS (2013)
Beatriz Blanco-Filgueira, Paula López, Manuel Suarez, Juan Bautista Roldán
CMOS photodiode model and HDL implementation. ECCTD (2013)
Beatriz Blanco-Filgueira, Paula López, Juan Bautista Roldán
A Verilog-AMS photodiode model including lateral effects. Microelectron. J. 43 (12) (2012)
Beatriz Blanco-Filgueira, Paula López, Jens Döge, Manuel Suarez, Juan Bautista Roldán
Evidence of the lateral collection significance in small CMOS photodiodes. ISCAS (2012)
Paula López, Beatriz Blanco-Filgueira, Johann Hauer
Modeling and experimental results of short channel annular MOS transistors. ECCTD (2011)
Beatriz Blanco-Filgueira, Paula López, Jens Döge
Analytical model for p-n junctions under point source illumination. ICECS (2010)
Fernando Pardo, Paula López, Diego Cabello, M. Balsi
Efficient software-hardware 3D heat equation solver with applications on the non-destructive evaluation of minefields. Comput. Geosci. 35 (11) (2009)
Paula López, Johann Hauer, Beatriz Blanco-Filgueira, Diego Cabello
model for short-channel polygonal enclosed-layout transistors. Int. J. Circuit Theory Appl. 37 (2) (2009)
Paula López, Beatriz Blanco-Filgueira, Diego Cabello, Johann Hauer
A study of CMOS radiation tolerant transistors using green functions. ECCTD (2009)
Paula López, Diego Cabello, Hans Hauer
Improved Analytical I-V model for polygonal-shape enclosed layout transistors. ECCTD (2007)
Fernando Pardo, Paula López, Diego Cabello
Soft-Hard 3D FD-TD Solver for Non Destructive Evaluation. FPL (2007)
Fernando Pardo, Paula López, Diego Cabello, M. Balsi
FPGA Implementation of 3-D Thermal Model Simulator. FPL (2006)
Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello
Practical considerations on doughnut transistors design. ECCTD (2005)
Paula López, Matthias Oberst, Harald Neubauer, Johann Hauer, Diego Cabello
Performance analysis of high-speed MOS transistors with different layout styles. ISCAS (4) (2005)
Fernando Pardo, Paula López, Diego Cabello, M. Balsi
FPGA Finite-Difference Time-Domain solver for thermal simulation. FPL (2005)
Paula López, David López Vilariño, Víctor M. Brea, Diego Cabello
Robustness oriented design tool for multilayer DTCNN applications. Int. J. Circuit Theory Appl. 30 (2-3) (2002)
Paula López, M. Balsi, David López Vilariño, Diego Cabello
Antipersonnel mine detection on infrared images. ISTAS (2000)
Paula López, David López Vilariño, Diego Cabello
Design of multilayer discrete time cellular neural networks for image processing tasks based on genetic algorithms. ISCAS (2000)
Paula López, David López Vilariño, Diego Cabello
Genetic Algorithm Based Training for Multilayer Discrete-Time Cellular Neural Networks. IWANN (2) (1999)