Performance analysis of high-speed MOS transistors with different layout styles.

Paula López Matthias Oberst Harald Neubauer Johann Hauer Diego Cabello

Published in: ISCAS (4) (2005)

Keyphrases

high speed
low power
real time
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learning algorithm
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computer vision
information systems
high speed networks
frame rate
cooperative
hierarchically organized
spatial layout
control system
optimal solution
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neural network
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