Ramón Ruiz Merino

Publication Activity (10 Years)

Years Active: 1999-2024
Publications (10 Years): 7

Top Topics

Hardware Architectures

Random Access Memory

Top Venues

J. Real Time Image Process.

Int. J. Circuit Theory Appl.

Circuits Syst. Signal Process.

Publications

José Ángel Díaz-Madrid, Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez
A real-time and energy-efficient SRAM with mixed-signal in-memory computing near CMOS sensors. J. Real Time Image Process. 21 (4) (2024)
Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez, José Ángel Díaz-Madrid
A 12T SRAM in-Memory Computing differential current architecture for CNN implementations. ISCAS (2023)
José Ángel Díaz-Madrid, Ginés Doménech-Asensi, J. Javier Martínez-Álvarez, Juan Zapata-Pérez, Ramón Ruiz Merino
Joint Implementation of the Sharing OTA and Bias Current Regulation Techniques in an 11-Bit 10 MS/s Pipelined ADC. Circuits Syst. Signal Process. 40 (2) (2021)
Ginés Doménech-Asensi, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Víctor Manuel Brea Sánchez, Paula López
All-hardware SIFT implementation for real-time VGA images feature extraction. J. Real Time Image Process. 17 (2) (2020)
José Ángel Díaz-Madrid, Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez, José Javier Martínez
Mixed Signal Multiply and Adder Parallel Circuit for Deep Learning Convolution Operations. ISCAS (2020)
Ricardo Carmona-Galán, Jorge Fernández-Berni, Ángel Rodríguez-Vázquez, Paula López Martinez, Víctor Manuel Brea Sánchez, Diego Cabello Ferrer, Ginés Doménech-Asensi, Ramón Ruiz Merino, Juan Zapata-Pérez
Results of 'iCaveats', a Project on the Integration of Architectures and Components for Embedded Vision. ICDSC (2018)
Pablo Rubio-Ibáñez, Ramón Ruiz Merino, Ginés Doménech-Asensi, J. Javier Martínez-Álvarez, Juan Zapata-Pérez, José Ángel Díaz-Madrid, José-Alejandro López Alcantud
An all-hardware implementation of the subpixel refinement stage in SIFT algorithm. Int. J. Circuit Theory Appl. 46 (9) (2018)
Ginés Doménech-Asensi, José Ángel Díaz-Madrid, Ramón Ruiz Merino
Synthesis of CMOS analog circuit VHDL-AMS descriptions using parameterizable macromodels. Int. J. Circuit Theory Appl. 41 (7) (2013)
Ginés Doménech-Asensi, F. Martinez-Viviente, J. Illade-Quinteiro, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, Juan Martínez-Alajarín, Francisco J. Fernández-Luque, Juan M. Carrillo, Miguel Angel Domínguez
A fourth order CMOS band pass filter for PIR sensors. ICECS (2012)
Ramón Ruiz Merino
Personal Notes about the Figure and Legate of Professor Mira. IWINAC (1) (2009)
José Ángel Díaz-Madrid, Harald Neubauer, Hans Hauer, Ginés Doménech-Asensi, Ramón Ruiz Merino
Power reduction of a 12-bit 40-MS/s pipeline ADC exploiting partial amplifier sharing. DATE (2009)
Ginés Doménech-Asensi, Juan Hinojosa, Ramón Ruiz Merino, José Ángel Díaz-Madrid
Accurate and reusable macromodeling technique using a fuzzy-logic approach. ISCAS (2008)
Juan Martínez-Alajarín, F. Javier Garrigós-Guerrero, Ramón Ruiz Merino
Optimization of the Compression Parameters of a Phonocardiographic Telediagnosis System Using Genetic Algorithms. IWINAC (1) (2007)
Juan Martínez-Alajarín, José López-Candel, Ramón Ruiz Merino
Classification and Diagnosis of Heart Sounds and Murmurs Using Artificial Neural Networks. IWINAC (1) (2007)
F. Javier Toledo-Moreo, A. Legaz-Cano, J. Javier Martínez-Álvarez, Juan Martínez-Alajarín, Ramón Ruiz Merino
Compression system for the phonocardiographic signal. FPL (2007)
Ginés Doménech-Asensi, Juan Martínez-Alajarín, Ramón Ruiz Merino, José-Alejandro López Alcantud
Synthesis on FPAA of a Smart Sthetoscope Analog Subsystem. FPL (2006)
Salvador Gabarda, Gabriel Cristóbal, Juan Martínez-Alajarín, Ramón Ruiz Merino
Detection of anomalous events in biomedical signals by wigner analysis and instant-wise Rényi entropy. EUSIPCO (2006)
Ginés Doménech-Asensi, José-Alejandro López Alcantud, Ramón Ruiz Merino
Description and Simulation of Bio-inspired Systems Using VHDL-AMS. IWINAC (2) (2005)
Ginés Doménech-Asensi, Ramón Ruiz Merino, Hans Hauer, José Ángel Díaz-Madrid
Current Mode CMOS Synthesis of a Motor-Control Neural System. IWANN (2) (2003)
José-Alejandro López Alcantud, José Ángel Díaz-Madrid, Hans Hauer, Ramón Ruiz Merino
An Analogue Current-Mode Hardware Design Proposal for Preprocessing Layers in ART-Based Neural Networks. IWANN (2) (2003)
Rafael Vilar, Juan Zapata-Pérez, Luis Bernabé, Ramón Ruiz Merino
Automatic Recognition of Weld Regions in Radiographic Images of Welded Joints. VIIP (2001)
Esperanza M. López, Alfonso Aniorte Carbonell, Ramón Ruiz Merino
Implementing a fuzzy processor on programmable logic circuits: modularization criteria. EUSFLAT-ESTYLF Joint Conf. (1999)