Nektarios Kranitis

Publication Activity (10 Years)

Years Active: 1999-2022
Publications (10 Years): 10

Top Topics

Hardware Architecture

Hyperspectral Image Compression

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Aerosp. Electron. Syst.

Publications

Antonis M. Paschalis, Panagiotis Chatziantoniou, Dimitris Theodoropoulos, Antonis Tsigkanos, Nektarios Kranitis
High-Performance Hardware Accelerators for Next Generation On-Board Data Processing. VLSI-SoC (2022)
Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. IEEE Trans. Aerosp. Electron. Syst. 58 (6) (2022)
Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis, Elias Machairas, Antonios Paschalis
Efficient Hardware Architectures and Implementations of Packet-Level Erasure Coding Schemes for High Data Rate Reliable Satellite Communications. IEEE Trans. Aerosp. Electron. Syst. 58 (3) (2022)
Panagiotis Chatziantoniou, Antonis Tsigkanos, Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis
An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology. CoRR (2022)
Antonis Tsigkanos, Nektarios Kranitis, George Theodorou, Antonis M. Paschalis
A 3.3 Gbps CCSDS 123.0-B-1 Multispectral & Hyperspectral Image Compression Hardware Accelerator on a Space-Grade SRAM FPGA. IEEE Trans. Emerg. Top. Comput. 9 (1) (2021)
Antonis Tsigkanos, Nektarios Kranitis, Dimitris Theodoropoulos, Antonis M. Paschalis
High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1. IEEE Trans. Very Large Scale Integr. Syst. 28 (11) (2020)
Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis
Efficient Architectures for Multigigabit CCSDS LDPC Encoders. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Dimitris Theodoropoulos, Nektarios Kranitis, Antonis Tsigkanos, Antonis M. Paschalis
Efficient LDPC Encoder Designs for Magnetic Recording Media. DFT (2020)
Ioannis Tsounis, Antonis Tsigkanos, Vasileios Vlagkoulis, Mihalis Psarakis, Nektarios Kranitis, Antonis M. Paschalis
Analyzing the Resilience to SEUs of an Image Data Compression Core in a COTS SRAM FPGA. AHS (2019)
Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis
An efficient LDPC encoder architecture for space applications. IOLTS (2016)
Nektarios Kranitis, Antonis Tsigkanos, George Theodorou, Ioannis Sideris, Antonis M. Paschalis
A single chip dependable and adaptable payload Data Processing Unit. IOLTS (2015)
Georgios Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Software-Based Self-Test for Small Caches in Microprocessors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (12) (2014)
George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Power-aware optimization of software-based self-test for L1 caches in microprocessors. IOLTS (2014)
Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo
Dependable reconfigurable space systems: Challenges, new trends and case studies. IOLTS (2014)
Giorgos Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21 (4) (2013)
Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes. IEEE Trans. Dependable Secur. Comput. 9 (1) (2012)
George Theodorou, Serafeim Chatzopoulos, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
A Software-Based Self-Test methodology for on-line testing of data TLBs. ETS (2012)
George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
A Software-Based Self-Test methodology for on-line testing of processor caches. ITC (2011)
Andreas Merentitis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis
Energy optimal on-line Self-Test of microprocessors in WSN nodes. ICCD (2010)
George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
A software-based self-test methodology for in-system testing of processor cache tag arrays. IOLTS (2010)
Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
SBST for on-line detection of hard faults in multiprocessor applications under energy constraints. IOLTS (2010)
Andreas Merentitis, George Theodorou, Mihalis Giorgaras, Nektarios Kranitis
Directed Random SBST Generation for On-Line Testing of Pipelined Processors. IOLTS (2008)
Nektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos
Hybrid-SBST Methodology for Efficient Testing of Processor Cores. IEEE Des. Test Comput. 25 (1) (2008)
Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Low Energy On-Line SBST of Embedded Processors. ITC (2008)
Andreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
Selecting Power-Optimal SBST Routines for On-Line Processor Testing. ETS (2007)
Nektarios Kranitis, Andreas Merentitis, Nikolaos Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis
Optimal periodic testing of intermittent faults in embedded pipelined processor applications. DATE (2006)
P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis
A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. IOLTS (2006)
Ioannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis
A concurrent built-in self-test architecture based on a self-testing RAM. IEEE Trans. Reliab. 54 (1) (2005)
Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis
Software-Based Self-Testing of Embedded Processors. IEEE Trans. Computers 54 (4) (2005)
Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian
Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. ITC (2003)
Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian
Instruction-Based Self-Testing of Processor Cores. J. Electron. Test. 19 (2) (2003)
George Xenoulis, Dimitris Gizopoulos, Nektarios Kranitis, Antonis M. Paschalis
Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores. IOLTS (2003)
Nektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian
Low-Cost Software-Based Self-Testing of RISC Processor Cores. DATE (2003)
Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian
Instruction-Based Self-Testing of Processor Cores. VTS (2002)
Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian
Effective Software Self-Test Methodology for Processor Cores. DATE (2002)
Mihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian
Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. VTS (2001)
Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian
Deterministic software-based self-testing of embedded processor cores. DATE (2001)
Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. ISQED (2001)
Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian
An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. J. Electron. Test. 17 (2) (2001)
Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian
Effective Low Power BIST for Datapaths. DATE (2000)
Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian
Low Power/Energy BIST Scheme for Datapaths. VTS (2000)
Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian
Power-/Energy Efficient BIST Schemes for Processor Data Paths. IEEE Des. Test Comput. 17 (4) (2000)
Mihalis Psarakis, Nektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian
Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths. LATW (2000)
Antonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian
An Effective BIST Architecture for Fast Multiplier Cores. DATE (1999)