Login / Signup

Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers.

Mihalis PsarakisAntonis M. PaschalisNektarios KranitisDimitris GizopoulosYervant Zorian
Published in: VTS (2001)
Keyphrases
  • low cost
  • real time
  • computationally efficient
  • digital camera
  • single chip
  • data sets
  • fault diagnosis
  • fault model