Mohab H. Anis

Publication Activity (10 Years)

Years Active: 2000-2017
Publications (10 Years): 6

Top Topics

Decomposition Methods

Shape Decomposition

Memory Capacity

Factorial Design

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

ACM Great Lakes Symposium on VLSI

Publications

Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei
A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems. IEEE Trans. Very Large Scale Integr. Syst. 25 (11) (2017)
Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei
1T2R: A novel memory cell design to resolve single-event upset in RRAM arrays. ASICON (2017)
Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei
Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic Systems. ISVLSI (2017)
Amr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei
Mitigating the Effect of Reliability Soft-errors of RRAM Devices on the Performance of RRAM-based Neuromorphic Systems. ACM Great Lakes Symposium on VLSI (2017)
Amr M. S. Tosson, Mohab H. Anis, Lan Wei
/Hf 1T1R RRAM Memory Cell. ACM Great Lakes Symposium on VLSI (2016)
Amr M. S. Tosson Abdelwahed, Adam Neale, Mohab H. Anis, Lan Wei
8T1R: A Novel Low-power High-speed RRAM-based Non-volatile SRAM Design. ACM Great Lakes Symposium on VLSI (2016)
Minoo Mirsaeedi, Andres J. Torres, Mohab H. Anis
Litho-Friendly Decomposition Method for Self-Aligned Triple Patterning. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Minoo Mirsaeedi, Andres J. Torres, Mohab H. Anis
Litho-Friendly Decomposition Method for Self-Aligned Double Patterning. IEEE Trans. Very Large Scale Integr. Syst. 21 (8) (2013)
Haitham Eissa, Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Mohamed Dessouky, David Nairn, Mohab H. Anis
Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow. IEEE Trans. Very Large Scale Integr. Syst. 21 (5) (2013)
Amr M. S. Tosson, Siddharth Garg, Mohab H. Anis
Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design. VLSI-SoC (2013)
Rami F. Salem, Mohamed Al-Imam, Abdelrahman ElMously, Haitham Eissa, Ahmed Arafa, Mohab H. Anis
High performance electrical driven hotspot detection solution for full chip design using a novel device parameter matching technique. ISQED (2012)
Ahmed Arafa, Hend Wagieh, Rami Fathy Salem, John Ferguson, Doug Morgan, Mohab H. Anis, Mohamed Dessouky
Schematic-driven physical verification: Fully automated solution for analog IC design. SoCC (2012)
Rami Fathy Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, David Nairn, Mohab H. Anis
An electrical-aware parametric DFM solution for analog circuits. IDT (2011)
Rami F. Salem, Ahmed Arafa, Sherif Hany, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, David Nairn, Mohab H. Anis
A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow. SoCC (2011)
Minoo Mirsaeedi, Mohab H. Anis
A statistical yield optimization framework for interconnect in double patterning lithography. Microelectron. J. 42 (11) (2011)
Minoo Mirsaeedi, J. Andres Torres, Mohab H. Anis
Self-aligned double patterning (SADP) layout decomposition. ISQED (2011)
Rami F. Salem, Abdelrahman ElMously, Haitham Eissa, Mohamed Dessouky, Mohab H. Anis
A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs. IDT (2010)
Sayed Alireza Sadrossadat, Minoo Mirsaeedi, Kumaraswamy Ponnambalam, Mohab H. Anis
Framework for statistical design of a flip-flop. ICECS (2009)
Mohab H. Anis
Managing Power Consumption and Variability in Nanometer Circuits. ICECS (2007)
Muhammad E. S. Elrabaa, Mohab H. Anis, Mohamed I. Elmasry
A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. ISCAS (2000)
Mohamed W. Allam, Mohab H. Anis, Mohamed I. Elmasry
Effect of technology scaling on digital CMOS logic styles. CICC (2000)