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A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages.
Muhammad E. S. Elrabaa
Mohab H. Anis
Mohamed I. Elmasry
Published in:
ISCAS (2000)
Keyphrases
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high speed
delay insensitive
inversely proportional
logic programming
power consumption
asynchronous circuits
threshold selection
random access memory
low cost
high levels
multi valued
circuit design
low power
digital circuits
active power
chip design