Mohab Anis

Publication Activity (10 Years)

Years Active: 2000-2016
Publications (10 Years): 2

Top Topics

Iterative Process

Image Retargeting

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Microelectron. J.

Publications

Ayman Yehia Hamouda, Mohab Anis, Karim S. Karim
Model-Based Initial Bias (MIB): Toward a Single-Iteration Optical Proximity Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Kareem Madkour, Sarah Mohamed, Dina Tantawy, Mohab Anis
Hotspot detection using machine learning. ISQED (2016)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Negative capacitance circuits for process variations compensation and timing yield improvement. CCECE (2014)
Esraa Swillam, Kareem Madkour, Mohab Anis
Layout regularity metric as a fast indicator of high variability circuits. SoCC (2013)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Negative capacitance circuits for process variations compensation and timing yield improvement. ICECS (2013)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits. IEEE Trans. Very Large Scale Integr. Syst. 21 (1) (2013)
Ayman Yehia Hamouda, Mohab Anis, Karim S. Karim
AIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield. DATE (2012)
Kian Haghdad, Javid Jaffari, Mohab Anis
Power grid analysis and verification considering temperature variations. Microelectron. J. 43 (3) (2012)
Kian Haghdad, Mohab Anis
Power Yield Analysis Under Process and Temperature Variations. IEEE Trans. Very Large Scale Integr. Syst. 20 (10) (2012)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB). IEEE Trans. Very Large Scale Integr. Syst. 20 (4) (2012)
Kian Haghdad, Mohab Anis
Timing yield analysis considering process-induced temperature and supply voltage variations. Microelectron. J. 43 (12) (2012)
Kian Haghdad, Mohab Anis
Power Supply Pads Assignment for Maximum Timing Yield. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Kian Haghdad, Mohab Anis, Yehea I. Ismail
Floorplanning for low power IC design considering temperature variations. Microelectron. J. 42 (1) (2011)
Javid Jaffari, Mohab Anis
On Efficient LHS-Based Yield Analysis of Analog Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (1) (2011)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity. IEEE Trans. Very Large Scale Integr. Syst. 19 (11) (2011)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2011)
Mohamed Rabie, Ahmed Bahgat, Khaled Ramadan, Hosam Shobak, Tarek Nasr, Mohamed Abdelhafez, Eslam A. Moustafa, Mohab Anis
A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations. ICEAC (2011)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2011)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells. IEEE Trans. Very Large Scale Integr. Syst. 19 (2) (2011)
Mohab Anis, Howard C. Luong, Gabriele Manganaro
Guest Editorial Special Section on 2010 IEEE Custom Integrated Circuits Conference (CICC 2010). IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Akhilesh Kumar, Mohab Anis
IR-Drop Aware Clustering Technique for Robust Power Grid in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 19 (7) (2011)
Mohamed H. Abu-Rahma, Mohab Anis, Sei Seung Yoon
Reducing SRAM Power Using Fine-Grained Wordline Pulsewidth Control. IEEE Trans. Very Large Scale Integr. Syst. 18 (3) (2010)
Vasudha Gupta, Mohab Anis
Statistical Design of the 6T SRAM Bit Cell. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2010)
Javid Jaffari, Mohab Anis
Correlation controlled sampling for efficient variability analysis of analog circuits. DATE (2010)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Statistical timing yield improvement of dynamic circuits using negative capacitance technique. ISCAS (2010)
Kian Haghdad, Mohab Anis
Scaling analysis of yield optimization considering supply and threshold voltage variations. ISCAS (2010)
Ahmed Youssef, Mohamed Zahran, Mohab Anis, Mohamed I. Elmasry
On the Power Management of Simultaneous Multithreading Processors. IEEE Trans. Very Large Scale Integr. Syst. 18 (8) (2010)
Akhilesh Kumar, Mohab Anis
Power-Yield Enhancement for Field Programmable Gate Arrays Under Process Variations. J. Low Power Electron. 6 (2) (2010)
Ahmed Youssef, Zhen Yang, Mohab Anis, Shawki Areibi, Anthony Vannelli, Mohamed I. Elmasry
A Power-Efficient Multipin ILP-Based Routing Technique. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2010)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops. ISCAS (2010)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2010)
Akhilesh Kumar, Mohab Anis
Robust FPGA Design under Variations. FPL (2010)
Javid Jaffari, Mohab Anis
Practical Monte-Carlo based timing yield estimation of digital circuits. DATE (2010)
Akhilesh Kumar, Mohab Anis
FPGA Design for Timing Yield Under Process Variations. IEEE Trans. Very Large Scale Integr. Syst. 18 (3) (2010)
Javid Jaffari, Mohab Anis
Advanced Variance Reduction and Sampling Techniques for Efficient Statistical Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Akhilesh Kumar, Mohab Anis
IR-Drop Management in FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (6) (2010)
Mohammed El-Abd, Hassan Hassan, Mohab Anis, Mohamed S. Kamel, Mohamed I. Elmasry
Discrete cooperative particle swarm optimization for FPGA placement. Appl. Soft Comput. 10 (1) (2010)
Javid Jaffari, Mohab Anis
Adaptive sampling for efficient failure probability analysis of SRAM cells. ICCAD (2009)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Total Power Modeling in FPGAs Under Spatial Correlation. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Javid Jaffari, Mohab Anis
Timing yield estimation of digital circuits using a control variate technique. ISQED (2009)
Akhilesh Kumar, Mohab Anis
IR-drop management CAD techniques in FPGAs for power grid reliability. ISQED (2009)
Mohab Anis, Emad Hegazi
Introduction to the special issue on the 2007 International Conference on Microelectronics. Microelectron. J. 40 (11) (2009)
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits. ISVLSI (2009)
Mohamed H. Abu-Rahma, Mohab Anis, Sei Seung Yoon
A robust single supply voltage SRAM read assist technique using selective precharge. ESSCIRC (2008)
Mohamed H. Abu-Rahma, Kinshuk Chowdhury, Joseph Wang, Zhiqin Chen, Sei Seung Yoon, Mohab Anis
A methodology for statistical estimation of read access yield in SRAMs. DAC (2008)
Javid Jaffari, Mohab Anis
Statistical Thermal Profile Considering Process Variations: Analysis and Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (6) (2008)
Javid Jaffari, Mohab Anis
Thermal Driven Placement for Island-style MTCMOS FPGAs. J. Comput. 3 (4) (2008)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Input Vector Reordering for Leakage Power Reduction in FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (9) (2008)
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs. IEEE Trans. Very Large Scale Integr. Syst. 16 (9) (2008)
Javid Jaffari, Mohab Anis
Variability-Aware Bulk-MOS Device Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (2) (2008)
Rizwan Mudassir, Mohab Anis, Javid Jaffari
Switching activity reduction in low power Booth multiplier. ISCAS (2008)
Kian Haghdad, Mohab Anis
Design-Specific Optimization Considering Supply and Threshold Voltage Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (10) (2008)
Mohab Anis
Advanced IC technology - opportunities and challenges. ISCAS (2008)
Vasudha Gupta, Mohab Anis
Area/yield trade-offs in scaled CMOS SRAM cell. ESSCIRC (2008)
Rodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis
Variability-aware design of subthreshold devices. ISCAS (2008)
Mohamed H. Abu-Rahma, Mohab Anis
A Statistical Design-Oriented Delay Variation Model Accounting for Within-Die Variations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (11) (2008)
Javid Jaffari, Mohab Anis
On efficient Monte Carlo-based statistical static timing analysis of digital circuits. ICCAD (2008)
Ahmed Youssef, Tor Myklebust, Mohab Anis, Mohamed I. Elmasry
A Low-Power Multi-Pin Maze Routing Methodology. ISQED (2007)
Javid Jaffari, Mohab Anis
Thermal-Aware Placement for FPGAs Using Electrostatic Charge Model. ISQED (2007)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs. ASP-DAC (2007)
Rodrigo Jaramillo-Ramirez, Mohab Anis
A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction. ISCAS (2007)
Mohamed H. Abu-Rahma, Mohab Anis
Variability in VLSI Circuits: Sources and Design Considerations. ISCAS (2007)
Akhilesh Kumar, Mohab Anis
Dual-Threshold CAD Framework for Subthreshold Leakage Power Aware FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (1) (2007)
Akhilesh Kumar, Mohab Anis
Dual-Vt Design of FPGAs for Subthreshold Leakage Tolerance. ISQED (2006)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Low-power multi-threshold MCML: Analysis, design, and variability. Microelectron. J. 37 (10) (2006)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Impact of technology scaling and process variations on RF CMOS devices. Microelectron. J. 37 (4) (2006)
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. MICRO (2006)
Akhilesh Kumar, Mohab Anis
An analytical state dependent leakage power model for FPGAs. DATE (2006)
Javid Jaffari, Mohab Anis
and leakage current constraints. ISLPED (2006)
Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry
Activity Packing in FPGAs for Leakage Power Reduction. DATE (2005)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
MOS current mode circuits: analysis, design, and variability. IEEE Trans. Very Large Scale Integr. Syst. 13 (8) (2005)
Akhilesh Kumar, Mohab Anis
Dual-Vt FPGA design for leakage power reduction (abstract only). FPGA (2005)
Hratch Mangassarian, Mohab Anis
On Statistical Timing Analysis with Inter- and Intra-Die Variations. DATE (2005)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. ISLPED (2005)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Design and optimization of MOS current mode logic for parameter variations. Integr. 38 (3) (2005)
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
POMR: a power-aware interconnect optimization methodology. IEEE Trans. Very Large Scale Integr. Syst. 13 (3) (2005)
Payam Ghafari, Ehsan Mirhadi, Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets. IWSOC (2005)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only). FPGA (2005)
Mohab Anis, Mohamed H. Abu-Rahma
Leakage Current Variability in Nanometer Technologies, invited. IWSOC (2005)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
MOS current mode logic: design, optimization, and variability. SoCC (2004)
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
POMR: a power-optimal maze routing methodology. SoCC (2004)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Impact of technology scaling on RF CMOS. SoCC (2004)
Wenxin Wang, Mohab Anis, Shawki Areibi
Fast techniques for standby leakage reduction in MTCMOS circuits. SoCC (2004)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Design and optimization of MOS current mode logic for parameter variations. ACM Great Lakes Symposium on VLSI (2004)
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
Analysis and design of low-power multi-threshold MCML. SoCC (2004)
Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
Design and optimization of multithreshold CMOS (MTCMOS) circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (10) (2003)
Mohab Anis, Mohamed W. Allam, Mohamed I. Elmasry
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. IEEE Trans. Very Large Scale Integr. Syst. 10 (2) (2002)
Mohab Anis, Mohamed I. Elmasry
Self-timed MOS current mode logic for digital applications. ISCAS (5) (2002)
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique. DAC (2002)
Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. ISLPED (2000)