Minxuan Zhang

Publication Activity (10 Years)

Years Active: 2003-2020
Publications (10 Years): 24

Top Topics

Network On Chip

Top Venues

IEICE Electron. Express

IEICE Trans. Inf. Syst.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Quan Deng, Youtao Zhang, Zhenyu Zhao, Shuzheng Zhang, Minxuan Zhang, Jun Yang
FRF: Toward Warp-Scheduler Friendly STT-RAM/SRAM Fine-Grained Hybrid GPGPU Register File Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Quan Deng, Youtao Zhang, Minxuan Zhang, Jun Yang
LAcc: Exploiting Lookup Table-based Fast and Accurate Vector Multiplication in DRAM-based CNN Accelerator. DAC (2019)
Quan Deng, Lei Jiang, Youtao Zhang, Minxuan Zhang, Jun Yang
DrAcc: a DRAM based accelerator for accurate CNN inference. DAC (2018)
Lei Shan, Canqun Yang, Weixia Xu, Minxuan Zhang
Heterogeneous acceleration for CNN training with many integrated core. ICSPCC (2017)
Naiyang Guan, Lei Shan, Canqun Yang, Weixia Xu, Minxuan Zhang
Delay Compensated Asynchronous Adam Algorithm for Deep Neural Networks. ISPA/IUCC (2017)
Quan Deng, Youtao Zhang, Minxuan Zhang, Jun Yang
Towards warp-scheduler friendly STT-RAM/SRAM hybrid GPGPU register file design. ICCAD (2017)
Hailiang Zhou, Xiantuo Tang, Minxuan Zhang, Yue Hao
Sub-threshold Performance Driven Choice in Tunneling CNFETs. NCCET (2016)
Hongguang Zhang, Minxuan Zhang, Zhenyu Zhao, Shuo Tian
A Novel Hybrid Last Level Cache Based on Multi-retention STT-RAM Cells. ACA (2016)
Lei Shan, He Wang, Weixia Xu, Canqun Yang, Minxuan Zhang
Accelerating Nyström Kernel Independent Component Analysis with Many Integrated Core Architecture. NCCET (2016)
Lei Shan, Minxuan Zhang, Lin Deng, Guohui Gong
A Dynamic Multi-precision Fixed-Point Data Quantization Strategy for Convolutional Neural Network. NCCET (2016)
Wei Guo, Minxuan Zhang, Chaoyun Yao, Peng Li, Chaochao Feng, Hongwei Zhou
Thermal optimal task allocation algorithm for multi-core 3D IC with interlayer cooling system. IEICE Electron. Express 13 (1) (2016)
Chengyi Zhang, Jiming Wang, Minxuan Zhang, Xiangdi Wu
A New DVFS Algorithm Design for Multi-core Processor Chip. NCCET (2016)
Suncheng Xiang, Minxuan Zhang, Zuocheng Xing, Cang Liu
Hardware design of ML algorithm in MIMO-OFDM system. ICSAI (2016)
Hongguang Zhang, Minxuan Zhang
A Novel L1 Cache Based on Volatile STT-RAM. NCCET (2016)
Peng Li, Wei Guo, Zhenyu Zhao, Minxuan Zhang
Impact of Heavy Ion Species and Energy on SEE Characteristics of Three-Dimensional Integrated Circuit. NCCET (2015)
Wei Guo, Minxuan Zhang, Peng Li, Chaoyun Yao, Hongwei Zhou
Thermal-Aware Floorplanner for Multi-core 3D ICs with Interlayer Cooling. NCCET (2015)
Quan Deng, Minxuan Zhang, Zhenyu Zhao, Peng Li
Mitigation Techniques Against TSV-to-TSV Coupling in 3DIC. NCCET (2015)
Chaoyun Yao, Chaochao Feng, Minxuan Zhang, Wei Guo, Shouzhong Zhu, Shaojun Wei
Partitioning Methods for Multicast in Bufferless 3D Network on Chip. NCCET (2015)
Chaoyun Yao, Chaochao Feng, Minxuan Zhang, Wei Guo, Shouzhong Zhu, Shaojun Wei
Exploring partitioning methods for multicast in 3D bufferless Network on Chip. IEICE Electron. Express 12 (22) (2015)
Wei Guo, Minxuan Zhang, Peng Li, Chaoyun Yao
Floorplanner for multi-core micro-processors in 3D ICs with interlayer cooling system. IEICE Electron. Express 12 (16) (2015)
Chao Song, Minxuan Zhang
Improved access pattern for ROB soft error rate mitigation based on 3D integration technology. 3DIC (2015)
Lu Tang, Jinli Yan, Zhigang Sun, Tao Li, Minxuan Zhang
Towards high-performance packet processing on commodity multi-cores: current issues and future directions. Sci. China Inf. Sci. 58 (12) (2015)
Peng Li, Wei Guo, Zhenyu Zhao, Minxuan Zhang, Quan Deng
SEU hardened layout design for SRAM cells based on SEU reversal. IEICE Electron. Express 12 (22) (2015)
Chao Song, Minxuan Zhang
Mitigating Soft Error Rate Through Selective Replication in Hybrid Architecture. NCCET (2015)
Yuan Li, Paul Chow, Jiang Jiang, Minxuan Zhang, Shaojun Wei
Software/Hardware Parallel Long-Period Random Number Generation Framework Based on the WELL Method. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Peng Li, Minxuan Zhang, Weicheng Zhang, Zhenyu Zhao, Chao Song, Hua Fan
Effect of charge sharing on SEU sensitive area of 40-nm 6T SRAM cells. IEICE Electron. Express 11 (4) (2014)
Ronghui Wang, Zhiguang Chen, Nong Xiao, Minxuan Zhang, Weihua Dong
Assimilating Cleaning Operations with Flash-Level Parallelism for NAND Flash-Based Devices. CIT (2014)
Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Zuocheng Xing
Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router. IEEE Trans. Very Large Scale Integr. Syst. 21 (6) (2013)
Anwen Huang, Chao Song, Wei Guo, Peng Li, Minxuan Zhang
An interference miss isolation mechanism based on skewed mapping for shared cache in Chip Multiprocessors. ASICON (2013)
Jun Gao, Minxuan Zhang, Zuocheng Xing, Chaochao Feng
Architecture and Implementation of a Reduced EPIC Processor. IEICE Trans. Inf. Syst. (1) (2013)
Yongqing Wang, Minxuan Zhang
Wormhole Bubble in Torus Networks. NCCET (2013)
Yancang Chen, Zhonghai Lu, Lunguo Xie, Jinwen Li, Minxuan Zhang
A single-cycle output buffered router with layered switching for Networks-on-Chips. Comput. Electr. Eng. 38 (4) (2012)
Yongqing Wang, Minxuan Zhang, Qingchao Yu, Zhengbin Pang
Adaptive Bubble Scheme with Minimal Buffers in Torus Networks. HPCC-ICESS (2012)
Yuan Li, Paul Chow, Jiang Jiang, Minxuan Zhang, Shaojun Wei
Software/hardware framework for generating parallel Gaussian random numbers based on the Monty Python method. FPT (2012)
Yuan Li, Jiang Jiang, Hanqiang Cheng, Minxuan Zhang, Shaojun Wei
An Efficient Hardware Random Number Generator Based on the MT Method. CIT (2012)
Anwen Huang, Jun Gao, Wei Guo, Wenqiang Shi, Minxuan Zhang, Jiang Jiang
PSA-NUCA: A Pressure Self-Adapting Dynamic Non-uniform Cache Architecture. NAS (2012)
Yu Cheng, Anguo Ma, Minxuan Zhang
Accurate and Simplified Prediction of L2 Cache Vulnerability for Cost-Efficient Soft Error Protection. IEICE Trans. Inf. Syst. (1) (2012)
Xianju Yang, Peixiang Yan, Jiang Jiang, Minxuan Zhang
Adaptive Capacity Sharing through Probabilistic Controlled Placement. J. Comput. 7 (5) (2012)
Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Xianju Yang
Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip. IEICE Trans. Inf. Syst. (4) (2012)
Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang
A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip. IEICE Trans. Inf. Syst. (5) (2012)
Chaochao Feng, Minxuan Zhang, Jinwen Li, Jiang Jiang, Zhonghai Lu, Axel Jantsch
A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip. ISVLSI (2011)
Xiaomin Jia, Jiang Jiang, Yongwen Wang, Shubo Qi, Tianlei Zhao, Guitao Fu, Minxuan Zhang
BP-NUCA: Cache Pressure-Aware Migration for High-Performance Caching in CMPs. Comput. Informatics 30 (5) (2011)
Yuan Li, Paul Chow, Jiang Jiang, Minxuan Zhang
Software/Hardware Framework for Generating Parallel Long-Period Random Numbers Using the WELL Method. FPL (2011)
Xun Chen, Jianwen Zhu, Minxuan Zhang
Timing-Driven Routing of High Fanout Nets. FPL (2011)
Yu Cheng, Yongwen Wang, Zuocheng Xing, Minxuan Zhang
Characterizing Time-Varying Behavior and Predictability of Cache AVF. INCoS (2011)
Chaochao Feng, Jinwen Li, Zhonghai Lu, Axel Jantsch, Minxuan Zhang
Evaluation of deflection routing on various NoC topologies. ASICON (2011)
Tianlei Zhao, Jiang Jiang, Guitao Fu, Shubo Qi, Xiaomin Jia, Minxuan Zhang
Accelerating the Extraction of Representative Behaviors of Programs with Dynamic Binary Translation. HPCC (2011)
Xiaomin Jia, Pingjing Lu, Caixia Sun, Minxuan Zhang
Dynamic Program Behavior Identification for High Performance CMPs with Private LLCs. IEICE Trans. Inf. Syst. (12) (2010)
Hailiang Zhou, Jiang Jiang, Minxuan Zhang, Liang Fang
Opitimization of tunneling carbon nanotube-FETs based on stair-case doping strategy. Sci. China Inf. Sci. 53 (12) (2010)
Shubo Qi, Jinwen Li, Zuocheng Xing, Xiaomin Jia, Minxuan Zhang
A Delay Model of Two-Cycle NoC Router in 2D-Mesh Network. ISVLSI (2010)
Xiaomin Jia, Jiang Jiang, Tianlei Zhao, Shubo Qi, Minxuan Zhang
Towards Online Application Cache Behaviors Identification in CMPs. HPCC (2010)
Yongwen Wang, Qianbing Zheng, Qiang Dou, Minxuan Zhang
Low Power Design for a Multi-core Multi-thread Microprocessor. GreenCom/CPSCom (2010)
Yu Cheng, Anguo Ma, Yuxing Tang, Minxuan Zhang
Phase Characterization and Classification for Micro-architecture Soft Error. EUC (2010)
Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang
A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip. NoCArc@MICRO (2010)
Zhou Hailiang, Minxuan Zhang, Fang Liang, Hao Yue
Performance Optimization of Conventional MOS-Like Carbon Nanotube-FETs Based on Dual-Gate-Material. ISVLSI (2010)
Shubo Qi, Minxuan Zhang, Jinwen Li, Tianlei Zhao, Chengyi Zhang, Shaoqing Li
A high performance router with dynamic buffer allocation for on-chip interconnect networks. ICCD (2010)
Chaochao Feng, Zhonghai Lu, Axel Jantsch, Jinwen Li, Minxuan Zhang
FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip. SoCC (2010)
Peixiang Yan, Xianju Yang, Minxuan Zhang
A Global Replacement Based on Actual Set Association. ICESS (2009)
Canwen Xiao, Minxuan Zhang, Yong Dou, Zhitong Zhao
Dimensional Bubble Flow Control and Fully Adaptive Routing in the 2-D Mesh Network on Chip. EUC (1) (2008)
Quanbao Sun, Minxuan Zhang, Liquan Xiao
Hardware-Based Multicast with Global Load Balance on k-ary n-trees. ICPP (2007)
Xinhua Tian, Minxuan Zhang
A Unified Compressed Cache Hierarchy Using Simple Frequent Pattern Compression and Partial Cache Line Prefetching. ICESS (2007)
Quanbao Sun, Liquan Xiao, Minxuan Zhang
-Trees. APPT (2007)
Tian Xinhua, Minxuan Zhang
A Unified Compressed Cache Hierarchy With Partial Cache Line Prefetching Used for SMT Processor. CDES (2007)
Qingying Deng, Minxuan Zhang, Jiang Jiang
A Parallel Infrastructure on Dynamic EPIC SMT. ICA3PP (2007)
Qingying Deng, Minxuan Zhang, Jiang Jiang
A Parallel Infrastructure on Dynamic EPIC SMT and Its Speculation Optimization. ISPA (2007)
Qingying Deng, Minxuan Zhang, Jiang Jiang
Register File Management and Compiler Optimization on EDSMT. ISPA Workshops (2007)
Caixia Sun, Hongwei Tang, Minxuan Zhang
Enhancing ICOUNT2.8 Fetch Policy with Better Fairness for SMT Processors. Asia-Pacific Computer Systems Architecture Conference (2006)
Caixia Sun, Hongwei Tang, Minxuan Zhang
Controlling Performance of a Time-Criticial Thread in SMT Processors by Instruction Fetch Policy. PDCAT (2006)
Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing
An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors. Asia-Pacific Computer Systems Architecture Conference (2006)
Caixia Sun, Hongwei Tang, Minxuan Zhang
A Fetch Policy Maximizing Throughput and Fairness for Two-Context SMT Processors. APPT (2005)
Minxuan Zhang, Caixia Sun
Enhancing DCache Warn Fetch Policy for SMT Processors. ISPA (2005)
Yimin Xia, Jun Luo, Minxuan Zhang
Detecting Memory Access Errors with Flow-Sensitive Conditional Range Analysis. ICESS (2005)
Caixia Sun, Minxuan Zhang
Dual-Stack Return Address Predictor. ICESS (2004)
Jingfei Jiang, Xiaoqiang Ni, Minxuan Zhang
Reconfigurable Cipher Processing Framework and Implementation. APPT (2003)