A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip.

Chaochao Feng Zhonghai Lu Axel Jantsch Minxuan Zhang

Published in: IEICE Trans. Inf. Syst. (2012)

Keyphrases

network on chip
routing algorithm
multi processor
network simulator
data transfer
power dissipation
high speed
ad hoc networks
single chip
signal processing
shortest path
network traffic