Controlling Performance of a Time-Criticial Thread in SMT Processors by Instruction Fetch Policy.
Caixia SunHongwei TangMinxuan ZhangPublished in: PDCAT (2006)
Keyphrases
- instruction set
- optimal policy
- parallel algorithm
- memory hierarchy
- parallel processing
- instructional design
- statistical machine translation
- multimedia
- policy makers
- computer assisted instruction
- action selection
- cooperative learning
- parallel computation
- high end
- parallel architectures
- information retrieval
- multiprocessor systems