Kyoji Yamashita

Publication Activity (10 Years)

Years Active: 2001-2005
Publications (10 Years): 0

Publications

Dondee Navarro, Takeshi Mizoguchi, Masami Suetake, Kazuya Hisamitsu, Hiroaki Ueno, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential. IEICE Trans. Electron. (5) (2005)
Shizunori Matsumoto, Hiroaki Ueno, Satoshi Hosokawa, Toshihiko Kitamura, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation. IEICE Trans. Electron. (2) (2005)
Toshihiro Matsuda, Hiroaki Takeuchi, Akira Muramatsu, Hideyuki Iwata, Takashi Ohzone, Kyoji Yamashita, Norio Koike, Ken-ichiro Tatsuuma
A Test Structure for Two-Dimensional Analysis of MOSFETs by Hot-Carrier-Induced Photoemission. IEICE Trans. Electron. (5) (2005)
Kazuya Hisamitsu, Hiroaki Ueno, Masayasu Tanaka, Daisuke Kitamaru, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
Temperature-independence-point properties for 0.1μm-scale pocket-implant technologies and the impact on circuit design. ASP-DAC (2003)
Mitiko Miura-Mattausch, Hiroaki Ueno, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
Circuit Simulation Models for Coming MOSFET Generations. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2002)
D. Miyawaki, Shizunori Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, Masami Suetake, Mitiko Miura-Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
Correlation method of circuit-performance and technology fluctuations for improved design reliability. ASP-DAC (2001)
Shizunori Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, Y. Tatsumi, Mitiko Miura-Mattausch, Shigetaka Kumashiro, Terufumi Yamaguchi, Kyoji Yamashita, Noriaki Nakayama
Test-circuit-based extraction of inter- and intra-chip MOSFET-performance variations for analog-design reliability. CICC (2001)