Junhao Shi

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 5

Top Topics

Standard Deviation

Activity Recognition

Building Blocks

Curvature Estimation

Top Venues

Internet Technol. Lett.

Adv. Intell. Syst.

Publications

Jie Zhang, Junhao Shi, Junhai Huang, Qihuan Wu, Yuwen Zhao, Jinzhao Yang, Hamed Rajabi, Zhigang Wu, Haijun Peng, Jianing Wu
In Situ Reconfigurable Continuum Robot with Varying Curvature Enabled by Programmable Tensegrity Building Blocks. Adv. Intell. Syst. 5 (7) (2023)
Junhao Shi
A Predictive Model of Spindle Thermal Error Based on DCGAN. ICMRE (2022)
Junhao Shi, Decheng Zuo, Zhan Zhang
A GAN-based data augmentation method for human activity recognition via the caching ability. Internet Technol. Lett. 4 (5) (2021)
Junhao Shi, Decheng Zuo, Zhan Zhang
Transition Activity Recognition System based on Standard Deviation Trend Analysis. Sensors 20 (11) (2020)
Junhao Shi, Decheng Zuo, Zhan Zhang, Danyan Luo
Sensor-based activity recognition independent of device placement and orientation. Trans. Emerg. Telecommun. Technol. 31 (4) (2020)
Junhao Shi, Mingmin Zhang, Zhigeng Pan
A real-time bimanual 3D interaction method based on bare-hand tracking. ACM Multimedia (2011)
Görschwin Fey, Junhao Shi, Rolf Drechsler
Efficiency of Multi-Valued Encoding in SAT-based ATPG. ISMVL (2006)
Junhao Shi, Görschwin Fey, Rolf Drechsler
Bridging fault testability of BDD circuits. ASP-DAC (2005)
Junhao Shi, Görschwin Fey, Rolf Drechsler, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel
PASSAT: Efficient SAT-Based Test Pattern Generation for Industrial Circuits. ISVLSI (2005)
Rolf Drechsler, Junhao Shi, Görschwin Fey
Synthesis of fully testable circuits from BDDs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (3) (2004)
Görschwin Fey, Junhao Shi, Rolf Drechsler
BDD Circuit Optimization for Path Delay Fault Testability. DSD (2004)
Junhao Shi, Görschwin Fey, Rolf Drechsler
BDD Based Synthesis of Symmetric Functions with Full Path-Delay Fault Testability. Asian Test Symposium (2003)
Rolf Drechsler, Junhao Shi, Görschwin Fey
MuTaTe: an efficient design for testability technique for multiplexor based circuits. ACM Great Lakes Symposium on VLSI (2003)