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Jouke Verbree
Publication Activity (10 Years)
Years Active: 2010-2012
Publications (10 Years): 0
Top Topics
Data Flow
Black Box
Fourier Transform
Top Venues
J. Electron. Test.
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Publications
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Erik Jan Marinissen
,
Chun-Chuan Chi
,
Mario Konijnenburg
,
Jouke Verbree
A DfT Architecture for 3D-SICs Based on a Standardizable Die Wrapper.
J. Electron. Test.
28 (1) (2012)
Brandon Noia
,
Krishnendu Chakrabarty
,
Sandeep Kumar Goel
,
Erik Jan Marinissen
,
Jouke Verbree
Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
30 (11) (2011)
Jouke Verbree
,
Erik Jan Marinissen
,
Philippe Roussel
,
Dimitrios Velenis
On the cost-effectiveness of matching repositories of pre-tested wafers for wafer-to-wafer 3D chip stacking.
ETS
(2010)
Erik Jan Marinissen
,
Jouke Verbree
,
Mario Konijnenburg
A structured and scalable test access architecture for TSV-based 3D stacked ICs.
VTS
(2010)
Brandon Noia
,
Sandeep Kumar Goel
,
Krishnendu Chakrabarty
,
Erik Jan Marinissen
,
Jouke Verbree
Test-architecture optimization for TSV-based 3D stacked ICs.
ETS
(2010)
Erik Jan Marinissen
,
Chun-Chuan Chi
,
Jouke Verbree
,
Mario Konijnenburg
3D DfT architecture for pre-bond and post-bond testing.
3DIC
(2010)
Mottaqiallah Taouil
,
Said Hamdioui
,
Jouke Verbree
,
Erik Jan Marinissen
On maximizing the compound yield for 3D Wafer-to-Wafer stacked ICs.
ITC
(2010)