Huaide Wang

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 5

Top Topics

Object Tracking

Simultaneous Localization And Mapping

Top Venues

Publications

Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Zhipeng Sun, Ke Lu
DOT-SLAM: A Stereo Visual Simultaneous Localization and Mapping (SLAM) System with Dynamic Object Tracking Based on Graph Optimization. Sensors 24 (14) (2024)
Yuan Zhu, Hao An, Huaide Wang, Ruidong Xu, Mingzhi Wu, Ke Lu
RC-SLAM: Road Constrained Stereo Visual SLAM System Based on Graph Optimization. Sensors 24 (2) (2024)
Yuan Zhu, Ruidong Xu, Chongben Tao, Hao An, Huaide Wang, Zhipeng Sun, Ke Lu
DS-Trans: A 3D Object Detection Method Based on a Deformable Spatiotemporal Transformer for Autonomous Vehicles. Remote. Sens. 16 (9) (2024)
Zhihong Wu, Hao An, Boyu Wu, Huaide Wang, Ke Lu
A Visual-Inertial Fusion Mapping and Localization System Using AprilTag in GNSS-Denied Scenes. ICIRA (9) (2023)
Zhihong Wu, Huaide Wang, Hao An, Yuan Zhu, Ruidong Xu, Ke Lu
DPC-SLAM: Discrete Plane Constrained VSLAM for Intelligent Vehicle in Road Environment. ITSC (2023)
Chi-Cheng Ju, Tsu-Ming Liu, Huaide Wang, Yung-Chang Chang, Chih-Ming Wang, Chang-Lin Hsieh, Brian Liu, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Min-Hao Chiu, Sheng-Jen Wang, Ping Chao, Meng-Jye Hu, Ryan Yeh, Ted Chuang, Hsiu-Yi Lin, Chung-Hung Tsai
A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver. VLSIC (2014)
Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee
An 87GHz QPSK transceiver with costas-loop carrier recovery in 65nm CMOS. ISSCC (2011)
Shih-Jou Huang, Yu-Ching Yeh, Huaide Wang, Pang-Ning Chen, Jri Lee
W-Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology. IEEE J. Solid State Circuits 46 (12) (2011)
Huaide Wang, Jri Lee
A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology. IEEE J. Solid State Circuits 45 (4) (2010)
Jri Lee, Huaide Wang, Wen-Tsao Chen, Yung-Pin Lee
Subharmonically injection-locked PLLs for ultra-low-noise clock generation. ISSCC (2009)
Jri Lee, Huaide Wang
Study of Subharmonically Injection-Locked PLLs. IEEE J. Solid State Circuits 44 (5) (2009)
Jri Lee, Ming-Shuan Chen, Huaide Wang
Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data. IEEE J. Solid State Circuits 43 (9) (2008)
Jri Lee, Mingchung Liu, Huaide Wang
A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology. IEEE J. Solid State Circuits 43 (6) (2008)
Jri Lee, Ming-Shuan Chen, Huaide Wang
A 20Gb/s Duobinary Transceiver in 90nm CMOS. ISSCC (2008)
Jri Lee, Huaide Wang
A 20Gb/s Broadband Transmitter with Auto-Configuration Technique. ISSCC (2007)