A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology.

Jri Lee Mingchung Liu Huaide Wang

Published in: IEEE J. Solid State Circuits (2008)

Keyphrases

cmos technology
phase locked loop
low power
clock frequency
high speed
power consumption
low voltage
spl times
multipath
parallel processing
high voltage
power dissipation
silicon on insulator
image sensor
mixed signal
wireless sensor networks
digital signal processing
low cost
wavelet transform