Duncan G. Elliott

Publication Activity (10 Years)

Years Active: 1999-2020
Publications (10 Years): 9

Top Topics

Vector Quantization

Fractal Image Coding

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

John Petrus Grey, Ian R. Mann, Michael D. Fleischauer, Duncan G. Elliott
Analytic Model for Low Earth Orbit Satellite Solar Power. IEEE Trans. Aerosp. Electron. Syst. 56 (5) (2020)
Stefan Damkjar, Collin Cupido, Charles Nokes, Ian R. Mann, Duncan G. Elliott
Design and Verification of a Robust Release Mechanism for CubeSat Deployables. CCECE (2019)
Honglan Jiang, Leibo Liu, Pieter P. Jonker, Duncan G. Elliott, Fabrizio Lombardi, Jie Han
A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2019)
Xiaoxue Jiang, Xiaojian Yu, Kambiz Moez, Duncan G. Elliott, Jie Chen
High-Efficiency Charge Pumps for Low-Power On-Chip Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Jinghang Liang, Duncan G. Elliott
Frequency Synthesis Based on A Novel Differential Locking Mechanism. ISCAS (2018)
Jinghang Liang, Duncan G. Elliott
Coresidual alias-locked loops. ISCAS (2016)
David L. Sloan, Benjamin Martin, Gordon Hall, Andrew Hakman, Philip A. Marshall, Stephane Martel, Christopher J. Backhouse, Vincent C. Gaudet, Duncan G. Elliott
HV-CMOS single-chip electronics platform for lab-on-chip DNA analysis. ISCAS (2016)
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
Design, evaluation and fault-tolerance analysis of stochastic FIR filters. Microelectron. Reliab. 57 (2016)
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
Design and evaluation of stochastic FIR filters. PACRIM (2015)
Ran Wang, Jie Han, Bruce F. Cockburn, Duncan G. Elliott
Stochastic circuit design and performance evaluation of vector quantization. ASAP (2015)
Jinghang Liang, Zhiyin Zhou, Jie Han, Duncan G. Elliott
A 6.0-13.5 GHz Alias-Locked Loop Frequency Synthesizer in 130 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2013)
Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott
Deeply Pipelined Digit-Serial LDPC Decoding. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2012)
Philip A. Marshall, Vincent C. Gaudet, Duncan G. Elliott
Effects of Varying Message Precision in Digit-Online LDPC Decoders. SiPS (2012)
Si-Yun J. Li, Tyler L. Brandon, Duncan G. Elliott, Vincent C. Gaudet
Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder. SiPS (2012)
John C. Koob, Sue Ann Ung, Bruce F. Cockburn, Duncan G. Elliott
Design and Characterization of a Multilevel DRAM. IEEE Trans. Very Large Scale Integr. Syst. 19 (9) (2011)
Zhengang Chen, Tyler L. Brandon, Duncan G. Elliott, Stephen Bates, Witold A. Krzymien, Bruce F. Cockburn
Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2010)
Maziyar Khorasani, Mohammad Behnam, Leendert van den Berg, Christopher J. Backhouse, Duncan G. Elliott
High-Voltage CMOS Controller for Microfluidics. IEEE Trans. Biomed. Circuits Syst. 3 (2) (2009)
Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott
A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2009)
Tyler L. Brandon, John C. Koob, Leendert van den Berg, Zhengang Chen, Amirhossein Alimohammad, Ramkrishna Swamy, Jason Klaus, Stephen Bates, Vincent C. Gaudet, Bruce F. Cockburn, Duncan G. Elliott
A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes. ISCAS (2008)
Maziyar Khorasani, Leendert van den Berg, Philip A. Marshall, Meysam Zargham, Vincent C. Gaudet, Duncan G. Elliott, Stephane Martel
Low-power static and dynamic high-voltage CMOS level-shifter circuits. ISCAS (2008)
Leendert van den Berg, Duncan G. Elliott
An alias-locked loop frequency synthesis architecture. ISCAS (2008)
Tyler L. Brandon, Robert Hang, Gary Block, Vincent C. Gaudet, Bruce F. Cockburn, Sheryl L. Howard, Christian Giasson, Keith Boyle, Paul Goud, Siavash Sheikh Zeinoddin, Anthony Rapley, Stephen Bates, Duncan G. Elliott, Christian Schlegel
A scalable LDPC decoder ASIC architecture with bit-serial message exchange. Integr. 41 (3) (2008)
Zhengang Chen, Tyler L. Brandon, Stephen Bates, Duncan G. Elliott, Bruce F. Cockburn
Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2008)
Ramkrishna Swamy, Stephen Bates, Tyler L. Brandon, Bruce F. Cockburn, Duncan G. Elliott, John C. Koob, Zhengang Chen
Design and Test of a 175-Mb/s, Rate-1/2 (128, 3, 6) Low-Density Parity-Check Convolutional Code Encoder and Decoder. IEEE J. Solid State Circuits 42 (10) (2007)
Raymond J. Sung, Duncan G. Elliott
Clock-Logic Domino Circuits for High-Speed and Energy-Efficient Microprocessor Pipelines. IEEE Trans. Circuits Syst. II Express Briefs (5) (2007)
Stephen Bates, Duncan G. Elliott, Ramkrishna Swamy
Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2006)
Zhengang Chen, Stephen Bates, Duncan G. Elliott, Tyler L. Brandon
Efficient Encoding and Termination of Low-Density Parity-Check Convolutional Codes. GLOBECOM (2006)
Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn
Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2006)
John C. Koob, Daniel A. Leder, Raymond J. Sung, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn, Lisa G. McIlrath
Design of a 3-D fully depleted SOI computational RAM. IEEE Trans. Very Large Scale Integr. Syst. 13 (3) (2005)
John C. Koob, Sue Ann Ung, Ashwin S. Rao, Daniel A. Leder, Craig S. Joly, Kristopher C. Breen, Tyler L. Brandon, Michael Hume, Bruce F. Cockburn, Duncan G. Elliott
Test and Characterization of a Variable-Capacity Multilevel DRAM. VTS (2005)
Bruce F. Cockburn, Jesús Hernández Tapia, Duncan G. Elliott
A Multilevel DRAM with Hierarchical Bitlines and Serial Sensing. MTDT (2003)
Kristopher C. Breen, Duncan G. Elliott
Aliasing and anti-aliasing in branch history table prediction. SIGARCH Comput. Archit. News 31 (5) (2003)
Xiaoling Sun, Bruce F. Cockburn, Duncan G. Elliott
An Efficient Functional Test for the Massively-Parallel C ?RAM Logic-Enhanced Memory Architecture. DFT (2003)
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott, Yunan Xiang, Sue Ann Ung
Fault Modeling and Pattern-Sensitivity Testing for a Multilevel DRAM. MTDT (2002)
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott
An Investigation into Crosstalk Noise in DRAM Structures. MTDT (2002)
Raymond J. Sung, John C. Koob, Tyler L. Brandon, Duncan G. Elliott, Bruce F. Cockburn
Design of an Embedded Fully-Depleted SOI SRAM. MTDT (2001)
Peter M. Nyasulu, Ralph Mason, W. Martin Snelgrove, Duncan G. Elliott
Minimizing the effect of the host bus on the performance of a computational RAM logic-in-memory parallel-processing system. CICC (1999)
Duncan G. Elliott, Michael Stumm, W. Martin Snelgrove, Christian Cojocaru, Robert McKenzie
Computational RAM: Implementing Processors in Memory. IEEE Des. Test Comput. 16 (1) (1999)
Gershom Birk, Duncan G. Elliott, Bruce F. Cockburn
A Comparative Simulation Study of Four Multilevel DRAMs. MTDT (1999)
Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott
Fault Models and Tests for a 2-Bit-per-Cell MLDRAM. IEEE Des. Test Comput. 16 (1) (1999)
C. Wickman, Duncan G. Elliott, Bruce F. Cockburn
Cost Models for Large File Memory DRAMs with ECC and Bad Block Marking. DFT (1999)