A 6.0-13.5 GHz Alias-Locked Loop Frequency Synthesizer in 130 nm CMOS.
Jinghang LiangZhiyin ZhouJie HanDuncan G. ElliottPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2013)
Keyphrases
- clock gating
- power consumption
- cmos technology
- clock frequency
- low power
- high speed
- power reduction
- power dissipation
- power management
- silicon on insulator
- nm technology
- dielectric constant
- text to speech
- vlsi circuits
- low cost
- metal oxide semiconductor
- circuit design
- image sensor
- low voltage
- low frequency
- delay insensitive