Minimizing the effect of the host bus on the performance of a computational RAM logic-in-memory parallel-processing system.
Peter M. NyasuluRalph MasonW. Martin SnelgroveDuncan G. ElliottPublished in: CICC (1999)
Keyphrases
- parallel processing
- computational power
- random access memory
- distributed processing
- processing speed
- parallel computation
- ibm sp
- processing units
- high speed
- main memory
- parallel computers
- parallel programming
- pc cluster
- parallel architectures
- real time
- memory access
- logic programming
- electronic circuits
- data skew
- general purpose