Costas E. Goutis

Publication Activity (10 Years)

Years Active: 1984-2016
Publications (10 Years): 4

Top Topics

Hardware Implementation

Nearest Neighbor Search

Locality Sensitive Hashing

Top Venues

IET Comput. Digit. Tech.

ACM Trans. Design Autom. Electr. Syst.

J. Circuits Syst. Comput.

ACM Trans. Archit. Code Optim.

Publications

Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis
Array Size Computation under Uniform Overlapping and Irregular Accesses. ACM Trans. Design Autom. Electr. Syst. 21 (2) (2016)
Harris E. Michail, Georgios Athanasiou, George Theodoridis, Andreas Gregoriades, Costas E. Goutis
Design and implementation of totally-self checking SHA-1 and SHA-256 hash functions' architectures. Microprocess. Microsystems 45 (2016)
Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Thanos Stouraitis, Costas E. Goutis
Area-Throughput Trade-Offs for SHA-1 and SHA-256 Hash Functions' Pipelined Designs. J. Circuits Syst. Comput. 25 (4) (2016)
Harris E. Michail, Apostolis Kotsiolis, Athanasios Kakarountas, George Athanasiou, Costas E. Goutis
Hardware implementation of the Totally Self-Checking SHA-256 hash core. EUROCON (2015)
Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis
A scalable and near-optimal representation of access schemes for memory management. ACM Trans. Archit. Code Optim. 11 (1) (2014)
Georgios Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis
Optimising the SHA-512 cryptographic hash function on FPGAs. IET Comput. Digit. Tech. 8 (2) (2014)
Vasilios I. Kelefouras, Angeliki Kritikakou, Costas E. Goutis
A Matrix-Matrix Multiplication methodology for single/multi-core architectures using SIMD. J. Supercomput. 68 (3) (2014)
Vasilios I. Kelefouras, Angeliki Kritikakou, Costas E. Goutis
A methodology for speeding up edge and line detection algorithms focusing on memory architecture utilization. J. Supercomput. 68 (1) (2014)
Harris E. Michail, Georgios Athanasiou, George Theodoridis, Costas E. Goutis
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs. Integr. 47 (4) (2014)
Vasilios I. Kelefouras, Angeliki Kritikakou, Konstantinos Siourounis, Costas E. Goutis
A Methodology for Speeding up MVM for Regular, Toeplitz and Bisymmetric Toeplitz Matrices. J. Signal Process. Syst. 77 (3) (2014)
Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis
A systematic approach to classify design-time global scheduling techniques. ACM Comput. Surv. 45 (2) (2013)
Angeliki Kritikakou, Francky Catthoor, Vasilios I. Kelefouras, Costas E. Goutis
Near-optimal and scalable intrasignal in-place optimization for non-overlapping and irregular access schemes. ACM Trans. Design Autom. Electr. Syst. 19 (1) (2013)
George Athanasiou, Harris E. Michail, George Theodoridis, Costas E. Goutis
High-performance FPGA implementations of the cryptographic hash function JH. IET Comput. Digit. Tech. 7 (1) (2013)
Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis
Near-Optimal Microprocessor and Accelerators Codesign with Latency and Throughput Constraints. ACM Trans. Archit. Code Optim. 10 (2) (2013)
George Athanasiou, George Theodoridis, Costas E. Goutis, Harris E. Michail, Takis Kasparis
A Systematic Flow for Developing Totally Self-Checking Architectures for SHA-1 and SHA-2 Cryptographic Hash Families. J. Circuits Syst. Comput. 22 (6) (2013)
Harris E. Michail, George Athanasiou, Andreas Gregoriades, George Theodoridis, Costas E. Goutis
On the Development of Totally Self-checking Hardware Design for the SHA-1 Hash Function. SECRYPT (2012)
Angeliki Kritikakou, Francky Catthoor, George Athanasiou, Vasilios I. Kelefouras, Costas E. Goutis
A template-based methodology for efficient microprocessor and FPGA accelerator co-design. ICSAMOS (2012)
Nikolaos Alachiotis, Vasilios I. Kelefouras, George Athanasiou, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis
A data locality methodology for matrix-matrix multiplication algorithm. J. Supercomput. 59 (2) (2012)
Harris E. Michail, George Athanasiou, Vasilios I. Kelefouras, George Theodoridis, Costas E. Goutis
On the exploitation of a high-throughput SHA-256 FPGA design for HMAC. ACM Trans. Reconfigurable Technol. Syst. 5 (1) (2012)
George Athanasiou, Chara I. Chalkou, D. Bardis, Harris E. Michail, George Theodoridis, Costas E. Goutis
High-throughput Hardware Architectures of the JH Round-three SHA-3 Candidate - An FPGA Design and Implementation Approach. SECRYPT (2012)
Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Costas E. Goutis
A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization. IEEE Trans. Signal Process. 59 (12) (2011)
Harris E. Michail, Dimitrios M. Schinianakis, Costas E. Goutis, Athanasios P. Kakarountas, Georgios N. Selimis
Cipher Block Based Authentication Module: a Hardware Design Perspective. J. Circuits Syst. Comput. 20 (2) (2011)
Harris E. Michail, George Athanasiou, George Makridakis, Costas E. Goutis
Designs and comparisons of authentication modules for IPSec in configurable and extensible embedded processor. ICECS (2010)
Athanasios Milidonis, Nikolaos Alachiotis, Vasileios Porpodas, Harris E. Michail, George A. Panagiotakopoulos, Athanasios P. Kakarountas, Costas E. Goutis
Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. J. Signal Process. Syst. 59 (3) (2010)
Harris E. Michail, George Athanasiou, Angeliki Kritikakou, Costas E. Goutis, Andreas Gregoriades, Vicky G. Papadopoulou
Ultra High Speed SHA-256 Hashing Cryptographic Module for IPSec Hardware/Software Codesign. SECRYPT (2010)
Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis
Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. J. Supercomput. 48 (2) (2009)
Harris E. Michail, Athanasios Kakarountas, Athanasios Milidonis, Costas E. Goutis
A Top-Down Design Methodology for Ultrahigh-Performance Hashing Cores. IEEE Trans. Dependable Secur. Comput. 6 (4) (2009)
Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis
Resource aware mapping on coarse grained reconfigurable arrays. Microprocess. Microsystems 33 (2) (2009)
Athanasios Milidonis, Vasileios Porpodas, Nikolaos Alachiotis, Athanasios P. Kakarountas, Harris E. Michail, George A. Panagiotakopoulos, Costas E. Goutis
Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. IET Comput. Digit. Tech. 3 (1) (2009)
Michalis D. Galanis, Costas E. Goutis
Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path. J. Syst. Archit. 54 (5) (2008)
Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis
Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. J. Signal Process. Syst. 50 (2) (2008)
Markos E. Papadonikolakis, Athanasios P. Kakarountas, Costas E. Goutis
Efficient high-performance implementation of JPEG-LS encoder. J. Real Time Image Process. 3 (4) (2008)
Stavros Georgiopoulos, Grigoris Dimitroulakos, Costas E. Goutis
Integrating high speed multipliers in Coarse Grain Reconfigurable Arrays. SoC (2008)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. J. Supercomput. 39 (3) (2007)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. PATMOS (2007)
Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis
A unified evaluation framework for coarse grained reconfigurable array architectures. Conf. Computing Frontiers (2007)
Harris E. Michail, George A. Panagiotakopoulos, Vasilis N. Thanasoulis, Athanasios Kakarountas, Costas E. Goutis
Server side hashing core exceeding 3 Gbps of throughput. Int. J. Secur. Networks 2 (3/4) (2007)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI (2007)
Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis
Speedups in embedded systems with a high-performance coprocessor datapath. ACM Trans. Design Autom. Electr. Syst. 12 (3) (2007)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. Very Large Scale Integr. Syst. 15 (12) (2007)
Athanasios P. Kakarountas, Haralambos Michail, Costas E. Goutis, Costas Efstathiou
Implementation of HSSec: a high-speed cryptographic co-processor. ETFA (2007)
Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis
Compiler assisted architectural exploration for coarse grained reconfigurable arrays. ACM Great Lakes Symposium on VLSI (2007)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. J. Supercomput. 40 (2) (2007)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. IPDPS (2007)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. J. Supercomput. 35 (2) (2006)
Michalis D. Galanis, Athanasios Milidonis, Athanasios Kakarountas, Costas E. Goutis
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems. Microelectron. J. 37 (6) (2006)
Harris E. Michail, Athanasios P. Kakarountas, Athanasios Milidonis, George A. Panagiotakopoulos, Vasilis N. Thanasoulis, Costas E. Goutis
Temporal and System Level Modifications for High Speed VLSI Implementations of Cryptographic Core. ICECS (2006)
Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis
Performance Improvements in Microprocessor Systems Utilizing a Copressor Data-Path. ICSAMOS (2006)
Athanasios Kakarountas, Haralambos Michail, Athanasios Milidonis, Costas E. Goutis, George Theodoridis
High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications. J. Supercomput. 37 (2) (2006)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. J. Supercomput. 38 (1) (2006)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Partitioning DSP applications to different granularity reconfigurable hardware. ICECS (2005)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ASAP (2005)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. IPDPS (2005)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis
Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. FPL (2005)
Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Costas E. Goutis
A method for partitioning applications in hybrid reconfigurable architectures. Des. Autom. Embed. Syst. 10 (1) (2005)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. PATMOS (2005)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. FCCM (2005)
Haralambos Michail, Athanasios Kakarountas, George N. Selimis, Costas E. Goutis
Optimizing SHA-1 Hash Function for High Throughput with a Partial Unrolling Study. PATMOS (2005)
Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis
A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. ISCAS (1) (2005)
Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis
Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. ASAP (2005)
Harris E. Michail, Athanasios P. Kakarountas, Athanasios Milidonis, Costas E. Goutis
Efficient implementation of the keyed-hash message authentication code (HMAC) using the SHA-1 hash function. ICECS (2004)
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis
A high performance data-path to accelerate DSP kernels. ICECS (2004)
Michalis D. Galanis, Paris Kitsos, Giorgos Kostopoulos, Nicolas Sklavos, Odysseas G. Koufopavlou, Costas E. Goutis
Comparison of the hardware architectures and FPGA implementations of stream ciphers. ICECS (2004)
Michalis D. Galanis, George Theodoridis, Spyros Tragoudas, Dimitrios Soudris, Costas E. Goutis
A Novel Data-Path for Accelerating DSP Kernels. SAMOS (2004)
Athanasios P. Kakarountas, George Theodoridis, Kyriakos S. Papadomanolakis, Costas E. Goutis
A novel high-speed counter with counting rate independent of the counter's length. ICECS (2003)
Gregory Dimitroulakos, Athanasios Milidonis, Michalis D. Galanis, George Theodoridis, Costas E. Goutis, Francky Catthoor
Power aware data type refinement on the HIPERLAN/2. ICECS (2003)
Grigoris Dimitroulakos, Nikolaos D. Zervas, Nicolas Sklavos, Costas E. Goutis
An efficient VLSI implementation for forward and inverse wavelet transform for JPEG2000. DSP (2002)
Nikolaos D. Zervas, Konstantinos Masselos, Yorgos A. Karayiannis, Costas E. Goutis
Energy Minimization Under Area and Performance Constraints for Multimedia Applications Realized on Embedded Cores. VLSI Design 2002 (3) (2002)
Konstantinos Masselos, Spyros Theoharis, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis
Memory accesses reordering for interconnect power reduction in sum-of-products computations. IEEE Trans. Signal Process. 50 (11) (2002)
Kyriakos S. Papadomanolakis, Athanasios P. Kakarountas, Nicolas Sklavos, Costas E. Goutis
A low power fault secure timer implementation based on the Gray encoding scheme. ICECS (2002)
Yiannis Andreopoulos, Nikolaos D. Zervas, Gauthier Lafruit, Peter Schelkens, Thanos Stouraitis, Costas E. Goutis, Jan Cornelis
A local wavelet transform implementation versus an optimal row-column algorithm for the 2D multilevel decomposition. ICIP (3) (2001)
Vassilis Spiliotopoulos, Nikolaos D. Zervas, Yiannis Andreopoulos, Giorgos P. Anagnostopoulos, Costas E. Goutis
Quantization effect on VLSI implementations for the 9/7 DWT filters. ICASSP (2001)
Nikolaos D. Zervas, Giorgos P. Anagnostopoulos, Vassilis Spiliotopoulos, Yiannis Andreopoulos, Costas E. Goutis
Evaluation of design alternatives for the 2-D-discrete wavelet transform. IEEE Trans. Circuits Syst. Video Technol. 11 (12) (2001)
Kostas Masselos, Francky Catthoor, A. Kakarudas, Costas E. Goutis, Hugo De Man
Memory hierarchy layer assignment for data re-use exploitation in multimedia algorithms realized on predefined processor architectures. ICECS (2001)
Nikolaos D. Liveris, Nikolaos D. Zervas, A. P. Kakaroudas, Costas E. Goutis
A code transformation-based methodology for improving I-cache performance. ICECS (2001)
Athanasios P. Kakarountas, Vasileios Kokkinos, Costas E. Goutis
Design of low-power on-line reconfigurable datapaths using self-checking circuits. ICECS (2001)
Yiannis Andreopoulos, Peter Schelkens, Nikolaos D. Zervas, Thanos Stouraitis, Costas E. Goutis, Jan Cornelis
A wavelet-tree image coding system with efficient memory utilization. ICASSP (2001)
A. P. Kakaroudas, Kyriakos Papadomanolakis, E. Karaolis, Spiros Nikolaidis, Nikolaos Alachiotis, Costas E. Goutis
Hardware and Power Requirements of Self-checking circuits. ICECS (1999)
E. Karaolis, Spiros Nikolaidis, Costas E. Goutis
Fault secure binary counter design. ICECS (1999)
Kostas Masselos, Francky Catthoor, Costas E. Goutis, H. DeMan
System-level power optimizing data-flow transformations for multimedia applications realized on programmable multimedia processors. ICECS (1999)
Konstantinos Masselos, Thanos Stouraitis, Costas E. Goutis
Novel codebook generation algorithms for vector quantization image compression. ICASSP (1998)
Labros Bisdounis, Spiros Nikolaidis, Odysseas G. Koufopavlou, Costas E. Goutis
Accurate timing model for the CMOS inverter. ICECS (1996)
Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis
Low-power image decoding using fractals. ICECS (1996)
George Theodoridis, S. Theoharis, Dimitrios Soudris, Odysseas G. Koufopavlou, Costas E. Goutis
A novel approach for reducing the switching activity in two-level logic circuits. ICECS (1996)
Anna Tatsaki, Chrissavgi Dre, Thanos Stouraitis, Costas E. Goutis
Prime-factor DCT algorithms. IEEE Trans. Signal Process. 43 (3) (1995)
Anna Tatsaki, Chrissavgi Dre, Thanos Stouraitis, Costas E. Goutis
On the computation of the prime factor DST. Signal Process. 42 (3) (1995)
George-Peter K. Economou, Dimitris K. Lymberopoulos, Costas E. Goutis
An ANNs-based system for the diagnosis and treatment of diseases. Neural Process. Lett. 2 (1) (1995)
Chrissavgi Dre, George Branis, Costas E. Goutis
Image coding using vector quantization of wavelet coefficients. Microprocess. Microprogramming 40 (10-12) (1994)
Anna Tatsaki, Costas E. Goutis
A bit-serial VLSI architecture for the 2-D discrete cosine transform. Microprocess. Microprogramming 40 (10-12) (1994)
S. L. Horianopoulos, D. E. Metafas, Costas E. Goutis, Theodore L. Deliyannis
A VLSI synthesis tool for complementary output delta modulation FIR filters. Microprocess. Microprogramming 34 (1-5) (1992)
Dimitrios J. Soudris, Michael K. Birbas, Costas E. Goutis
Mapping iterative algorithims on regular processor arrays without using uniform recurrent equations. Microprocessing and Microprogramming 31 (1-5) (1991)
Dimitris E. Metafas, Costas E. Goutis
A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms. Microprocessing and Microprogramming 30 (1-5) (1990)
N. A. Kyrloglou, Odysseas G. Koufopavlou, Costas E. Goutis
A generator for a number format conversion IC. Microprocessing and Microprogramming 30 (1-5) (1990)
Costas E. Goutis, J. S. Sheblee, G. Russell
2-D Array processor having a controlled pipelined architecture for elliptical sparse matrices. ICASSP (1985)
Richard M. Leahy, Costas E. Goutis
Optimal techniques for constraint based signal restoration and image reconstruction. ICASSP (1985)
M. K. Ibrahim, Costas E. Goutis
Detection algorithms based on prediction error - additive noise - data orthogonality. ICASSP (1985)
Costas E. Goutis, Richard M. Leahy, P. G. Cassidy
Spectra using data distribution and covariance modelling. ICASSP (1984)