Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System.
Michalis D. GalanisGrigoris DimitroulakosCostas E. GoutisPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2007)
Keyphrases
- systolic array
- digital signal
- orders of magnitude
- signal processing
- energy minimization
- smart camera
- digital signal processing
- general purpose
- low cost
- energy consumption
- parallel processing
- embedded systems
- reconfigurable architecture
- neural network
- hardware implementation
- minimum energy
- digital signal processor
- high speed
- energy efficiency
- data flow
- energy efficient
- ontology mapping
- wireless sensor networks
- low energy
- evolutionary algorithm
- real time image processing
- relational databases
- case study
- data mining